Self-Timed Ring Oscillator RNG With Duty-Corrected Entropy Extraction

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Solution Overview

Problem

Existing random number generators struggle to produce high-speed, unpredictable true random numbers with no periodicity, essential for secure systems, as they often rely on pseudo-random methods that lack true randomness and entropy.

Innovation Solution

The implementation of a self-timed ring (STR) oscillator-based random number generator that includes an initial random number generator, a duty corrector, and a sampling circuit to generate and correct output values, ensuring high entropy and randomness by randomly distributing token positions and adjusting duty ratios, thereby improving the quality and speed of generated random numbers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a traditional random number generator uses thermal noise or shot noise to generate true random numbers, then the randomness and unpredictability are improved, but the generation speed is limited and cannot achieve high-speed operation

Engineering Contradiction:

Improverandomness qualityVSAvoidgeneration speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent replaces physical noise sources (thermal noise, shot noise) with a digital logic-based STR oscillator system. The STR oscillator uses a ring of logic gates with feedback and control mechanisms to generate random bits digitally, eliminating the speed limitations of analog noise sources while maintaining cryptographic quality through entropy extraction and duty cycle correction

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces dynamic control elements including a control signal that adjusts the duty cycle of the STR oscillator output, and an entropy extraction mechanism that dynamically processes the oscillator output. The system transitions between different operational states (oscillation mode, extraction mode) to optimize both speed and randomness quality

Inventive Principle:

Principle #15Dynamics

2Productivity

If a pseudo random number generator is used to achieve high-speed generation, then the generation speed is improved, but the true randomness and entropy are insufficient for security applications

Engineering Contradiction:

Improvegeneration speedVSAvoidentropy quality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent introduces an entropy extraction mechanism as an intermediary between the STR oscillator and the final random number output. This intermediary process includes duty cycle correction and selective bit extraction that transforms the STR oscillator's output into high-entropy random numbers, ensuring cryptographic quality while maintaining high generation speed

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operational parameters of the STR oscillator by controlling the duty cycle through a control signal. By adjusting the duty cycle parameter, the system optimizes the balance between oscillation stability and random bit generation, enabling high-speed operation with maintained entropy quality

Inventive Principle:

Principle #35Parameter changes

3Productivity

If the STR oscillator generates random numbers without duty correction, then the generation speed is maintained, but the output values have biased duty ratios that reduce randomness quality

Engineering Contradiction:

Improvegeneration speedVSAvoidduty ratio accuracy

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements a feedback mechanism where the STR oscillator output is monitored and processed through an entropy extraction stage that includes duty cycle correction. The control signal adjusts the duty cycle based on the oscillator's output characteristics, creating a closed-loop system that maintains both speed and precision

Inventive Principle:

Principle #23Feedback

4Reliability

If multiple ring stages are used in the STR oscillator to improve randomness, then the entropy performance is improved, but the device complexity increases

Engineering Contradiction:

Improveentropy performanceVSAvoidoscillator structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the random number generation process into distinct functional stages: the STR oscillator stage with multiple ring stages for entropy generation, the duty correction stage for parameter optimization, and the entropy extraction stage for final random bit generation. This segmentation allows each stage to be optimized independently, managing complexity while maximizing entropy performance

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP4184312A1Random number generators, integrated circuits having random number generators, and methods of operating random number generators

Publication Date: 2023.05.24 SAMSUNG ELECTRONICS CO LTD

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Figure 2A~2C
Figure 3A~3B

AI summary

A random number generator according to example embodiments includes an initial random number generator (110) configured to generate an initial random number (INI_RN) , a self-timed ring (STR) oscillator (120) configured to receive the initial random number, the STR oscillator having a plurality of ring stages generating, in response to a clock, either a bubble that does not change an output state of a previous clock or a token changing the output state of the previous clock, a duty corrector (130) configured to adjust a duty of each of output values of the ring stages, and a sampling circuit (140) configured to sample a random number using a logic operation from the duty-corrected output values.