Straight Narrow Fin CMOS Structure via Selective Oxidation

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Solution Overview

Problem

Semiconductor devices, particularly FinFET CMOS devices at the 20 nm technology node and beyond, face challenges in forming narrow and straight fin profiles due to high aspect ratios, leading to fin bending and tapered profiles, with existing methods failing to create desired straight fin profiles at narrow widths.

Innovation Solution

The method involves forming silicon fins separated by shallow trench isolation regions, recessing these regions, and using a nitride layer and organic planarization layer to expose and remove portions, followed by oxidation to thin the fin upper portions while protecting lower portions, allowing for the formation of a metal gate, resulting in straight and narrow fins in the channel region and wider fins in source/drain regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fins are made narrower to increase device density, then device density is improved, but fin bending occurs due to high aspect ratio

Engineering Contradiction:
Improvedevice densityVSAvoidfin straightness
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The fin structure is segmented into different width regions: narrower width in the channel region (improving density) and wider width in the source/drain regions (improving stability). This segmentation allows each region to have optimized dimensions for its specific function while maintaining overall structural integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the fin structure are given different local properties: the channel region fins are made narrow for high density, while the source/drain region fins are made wider for structural support. The nitride layer is also applied selectively to protect specific regions during processing.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If fins are made taller to increase channel length control, then device performance is improved, but fin bending increases due to higher aspect ratio

Engineering Contradiction:
Improvechannel length controlVSAvoidfin straightness
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The fin structure is divided into channel region fins and source/drain region fins with different widths. The taller fins in the channel region are stabilized by the wider fins in the source/drain regions, allowing height increase for better channel control while preventing bending through the wider base structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The wider source/drain region fins act as counterweights or support structures that balance the high aspect ratio of the taller channel region fins, preventing them from bending while maintaining the desired channel length control.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

3Ease of manufacture

If current fin shaping process is used, then manufacturing simplicity is maintained, but fins have undesirably tapered profile

Engineering Contradiction:
Improveprocess simplicityVSAvoidfin profile straightness
Core Design Contradiction:
Ease of manufactureVSShape

Solution Approach 1:

A nitride layer is deposited conformally over the fin structure before the final shaping process. This preliminary layer serves as a protective and guiding structure that enables subsequent selective removal to create straight fin profiles with narrow widths, achieving the desired shape while maintaining reasonable manufacturing complexity.

Inventive Principle:
Principle #10Preliminary action

4Length of moving object

If fin width is reduced to 20 nm or below, then device scaling is achieved, but fin bending becomes more susceptible

Engineering Contradiction:
Improvefin widthVSAvoidfin straightness
Core Design Contradiction:
Length of moving objectVSStability of the object's composition

Solution Approach 1:

The fin structure is segmented such that the channel region fins have the target narrow width (20 nm or below) for scaling, while the source/drain region fins are made wider to provide structural support. This segmentation allows aggressive scaling in the channel while maintaining stability through the wider support regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fin width is optimized locally for each region: narrow width (20 nm or below) in the channel region for scaling and performance, and wider width in the source/drain regions for structural stability. This local optimization allows achieving both scaling goals and structural integrity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents fin bending and achieves the desired straight and narrow fin profiles in the channel region while maintaining wider profiles under the gate spacer and source/drain regions, enhancing the structural integrity and performance of semiconductor devices.

Implementation Method 1

oxidizing exposed portions of the Si fins; and removing the oxidized Si

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS9972621B1Fin structure in sublitho dimension for high performance CMOS application
Publication Date: 2018.05.15 GLOBALFOUNDRIES US INC
  • US9972621B1 patent drawing
  • US9972621B1 patent drawing
  • US9972621B1 patent drawing

AI summary

A method of forming straight and narrow fins in the channel region and the resulting device are provided. Embodiments include forming Si fins separated by STI regions; recessing the STI regions to reveal the Si fins; forming a nitride layer over the STI regions and the Si fins; forming an OPL over the nitride layer between the Si fins; recessing the OPL to expose portions of the nitride layer over the Si fins; removing exposed portions of the nitride layer; removing the OPL; forming an oxide layer over exposed portions of the Si fins; forming a dummy gate over the nitride layer and the oxide layer perpendicular to the Si fins and surrounded by an ILD; removing the dummy gate and the oxide layer forming a cavity; thinning the Si fins in the cavity; and forming a RMG in the cavity.