Strain-Relaxed Semiconductor Layers on Lattice-Mismatched Substrates

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Solution Overview

Problem

Conventional methods for forming strain-relaxed semiconductor layers on lattice-mismatched substrates face challenges such as high threading dislocation densities, increased growth time, and material costs, particularly when growing thick silicon-germanium buffer layers, which can lead to defects and reduced performance in semiconductor devices.

Innovation Solution

The formation of a porous region on a semiconductor substrate allows for the growth of a first lattice-matched semiconductor layer, followed by a second strained layer that is then relaxed, with optional additional layers, using techniques like thermal annealing to manage dislocation densities and achieve strain relaxation, thereby reducing threading dislocations and enabling high germanium concentration layers with low defect densities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a thick graded silicon-germanium buffer layer is grown to reduce threading dislocation density, then the threading dislocation density decreases, but the growth time increases significantly and material costs increase

Engineering Contradiction:
Improvethreading dislocation densityVSAvoidgrowth time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

A thin silicon layer is grown first as a preliminary sacrificial layer before growing the silicon-germanium layer. This preliminary action creates a buffer zone that absorbs threading dislocations, allowing the silicon-germanium layer to be grown thinner while still achieving low threading dislocation density in the final strained silicon layer.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The thin silicon layer acts as an intermediary between the graded silicon-germanium buffer layer and the strained silicon layer. It mediates the dislocation propagation by providing a sacrificial zone that captures threading dislocations, preventing them from reaching the strained silicon layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If a thick graded silicon-germanium buffer layer is grown to reduce threading dislocation density, then the threading dislocation density decreases, but the material costs increase

Engineering Contradiction:
Improvethreading dislocation densityVSAvoidmaterial cost
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

A thin silicon layer is grown first as a preliminary sacrificial layer before growing the silicon-germanium layer. This preliminary action creates a buffer zone that absorbs threading dislocations, allowing the silicon-germanium layer to be grown thinner while still achieving low threading dislocation density in the final strained silicon layer.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The thin silicon layer acts as an intermediary between the graded silicon-germanium buffer layer and the strained silicon layer. It mediates the dislocation propagation by providing a sacrificial zone that captures threading dislocations, preventing them from reaching the strained silicon layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a thin silicon layer is grown on a graded silicon-germanium buffer layer to achieve high carrier mobility, then carrier mobility increases, but threading dislocations from the buffer layer cause defects in the silicon layer

Engineering Contradiction:
Improvecarrier mobilityVSAvoiddefect density
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An additional thin silicon layer is introduced as an intermediary between the graded silicon-germanium buffer layer and the strained silicon layer. This intermediary layer acts as a sacrificial zone that absorbs threading dislocations from the buffer layer, preventing them from propagating into the strained silicon layer and causing defects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The additional thin silicon layer serves as a disposable sacrificial layer that is intentionally made defective to protect the valuable strained silicon layer. This sacrificial layer absorbs the harmful threading dislocations and can be selectively removed or left in place, sacrificing itself to preserve the quality of the strained silicon layer.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in strain-relaxed semiconductor layers with reduced threading dislocation densities, enabling the growth of high germanium concentration layers with low defects, suitable for high-performance semiconductor devices, while being cost-effective and compatible with conventional bulk silicon substrates.

Implementation Method 1

a porous region is formed in a surface of a semiconductor substrate

Methodology Applied
Scientific EffectElectrochemical etching:

Implementation Method 2

The second semiconductor layer is then relaxed

Methodology Applied
Scientific EffectThermal annealing: Annealing

Implementation Method 3

misfit dislocations 22 may be generated at the interface between the bulk silicon substrate 10 and the graded Si1-xGex layer 20

Methodology Applied
Scientific EffectStrain relaxation: Stress Relaxation

Implementation Method 4

a graded silicon-germanium (Si1-xGex) layer 20 is epitaxially grown on a bulk silicon substrate 10

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9343303B2Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices
Publication Date: 2016.05.17 SAMSUNG ELECTRONICS CO LTD
  • US9343303B2 patent drawing
  • US9343303B2 patent drawing
  • US9343303B2 patent drawing

AI summary

Methods of forming strain-relaxing semiconductor layers are provided in which a porous region is formed in a surface of a semiconductor substrate. A first semiconductor layer that is lattice-matched with the semiconductor substrate is formed on the porous region. A second semiconductor layer is formed on the first semiconductor layer, the second semiconductor layer being a strained layer as formed. The second semiconductor layer is then relaxed.