Strain Relief Buffer Layer for Semiconductor Substrate Integration

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Solution Overview

Problem

The integration of alternative semiconductor materials with silicon substrates is challenging due to lattice constant mismatches, making it difficult to produce high-performance FinFET devices with reduced short channel effects and increased charge carrier mobility, especially for CMOS applications where multiple channel materials are needed for N-type and P-type devices.

Innovation Solution

A method involving a first semiconductor material layer, a strain relief buffer layer, and a second semiconductor material layer, with an opening formed in the second layer and an insulating sidewall spacer, allowing for the growth of a third semiconductor material within the opening, enabling the formation of substrates suitable for both N-type and P-type transistor devices with enhanced performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If alternative semiconductor materials are integrated with silicon substrates, then charge carrier mobility is improved, but lattice constant mismatch causes defects and reduces manufacturing reliability

Engineering Contradiction:

Improvemanufacturing reliabilityVSAvoidlattice constant mismatch defects

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A strain relief buffer layer is introduced as an intermediary between the silicon substrate and the alternative semiconductor material layer. This buffer layer has a lattice constant that gradually transitions from the silicon substrate lattice constant to the alternative material lattice constant, reducing the harmful effects of lattice mismatch and enabling high-quality material integration.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The lattice constant parameter is gradually changed through the strain relief buffer layer, which provides a transition zone between the silicon substrate and alternative semiconductor material. This gradual parameter change reduces defects caused by abrupt lattice constant differences.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If multiple semiconductor material layers are formed, then substrates suitable for both N-type and P-type devices are created, but process complexity increases

Engineering Contradiction:

Improvesubstrate compatibility for N-type and P-type devicesVSAvoidprocess complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The substrate structure is segmented into distinct functional layers: a silicon substrate layer, a strain relief buffer layer, and alternative semiconductor material layers. This segmentation allows each layer to be optimized independently while maintaining overall compatibility for both N-type and P-type device fabrication.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The strain relief buffer layer serves multiple functions: it provides mechanical strain relief, acts as a lattice constant transition layer, and enables the integration of alternative semiconductor materials. This multi-functionality reduces the need for additional specialized layers, thereby managing process complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Speed

If channel length is decreased to improve switching speed, then operating speed increases, but short channel effects worsen

Engineering Contradiction:

Improveswitching speedVSAvoidshort channel effect control

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The channel structure uses composite materials combining silicon substrate with alternative semiconductor materials (such as III-V族 materials) that have higher charge carrier mobility. This composite structure enables shorter channel lengths to achieve the same switching speed while maintaining better electrostatic control and reducing short channel effects.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach facilitates the formation of substrates that reduce defects and improve charge carrier mobility, enabling the production of high-performance FinFET devices compatible with traditional CMOS manufacturing, thereby addressing the limitations of existing substrate integration techniques.

Implementation Method 1

a strain relief buffer layer positioned between the first and second layers

Methodology Applied

Scientific EffectStrain relief: Stress Relaxation

Data Source

PatentUS9368578B2Methods of forming substrates comprised of different semiconductor materials and the resulting device

Publication Date: 2016.06.14 GLOBALFOUNDRIES US INC

AI summary

Obtaining a structure comprised of first and second layers of a first semiconductor materials and a strain relief buffer (SRB) layer between the first and second layers, forming a sidewall spacer on the sidewalls of an opening in the second layer, and forming a third semiconductor material in the opening, wherein the first, second and third semiconductor materials are different. A device includes first and second layers of first and second semiconductor materials and an SRB layer positioned above the first layer. The second layer is positioned above a first portion of the SRB layer, a region of a third semiconductor material is in an opening in the second layer and above a second portion of the SRB layer, and an insulating material is positioned between the region comprised of the third semiconductor material and the second layer.