Strained Channel CMOS Devices via Epitaxial Source Drain Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the integration of integrated circuit devices increases, the size of these devices decreases, leading to reduced electron and hole charge mobility in channel regions, and existing solutions are either complex or costly.
Innovation Solution
The integration of epitaxially grown materials, such as silicon germanium and silicon carbide, in source/drain regions to induce compressive and tensile strain on channel regions, respectively, within a CMOS device, enhancing charge mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device size is reduced to increase integration, then integration density improves, but charge mobility in channel regions deteriorates
Solution Approach 1:
The patent changes the physical state of the source/drain regions by introducing strained semiconductor materials (such as SiGe or SiC) with different lattice constants than the channel material. This material substitution creates mechanical strain in the channel region, which modifies the band structure and improves charge carrier mobility despite the reduced device dimensions. The strain parameter is controlled by adjusting the composition ratio of the strained material.
2Reliability
If complex processes are used to improve charge mobility, then charge mobility improves, but manufacturing complexity increases
Solution Approach 1:
The patent merges the source/drain region formation with the strain introduction process by epitaxially growing strained semiconductor materials directly in the source/drain regions during the standard CMOS fabrication sequence. This integration eliminates the need for separate strain engineering steps, such as independent material deposition or mechanical strain application processes, thereby maintaining manufacturing simplicity while achieving improved charge mobility.
3Reliability
If complex processes are used to improve charge mobility, then charge mobility improves, but manufacturing cost increases
Solution Approach 1:
The strained semiconductor material serves multiple functions simultaneously: it forms the source/drain regions providing electrical contact, introduces mechanical strain to the channel to improve mobility, and can be integrated into existing CMOS fabrication lines using standard epitaxial growth techniques. This multi-functionality eliminates the need for separate, costly process steps while achieving the desired performance improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves charge carrier mobility in channel regions while simplifying the manufacturing process and reducing costs, thereby addressing the limitations of existing technologies.
Implementation Method 1
The source/drain regions include an epitaxially grown material configured form a heterojunction with the substrate
Implementation Method 2
The source/drain regions are also configured to induce a net compressive strain or a net tensile strain on the channel region
Data Source
AI summary
A method of fabricating an integrated circuit device includes forming first and second gate patterns on surfaces of a semiconductor substrate in PMOS and NMOS regions, respectively, of the substrate. P-type source/drain regions are epitaxially grown on opposite sides of the first gate pattern in the PMOS region to exert compressive stress on a first channel region therebetween adjacent the first gate pattern. N-type source/drain regions are epitaxially grown on opposite sides of the second gate pattern in the NMOS region to exert tensile stress on a second channel region therebetween adjacent the second gate pattern. Related devices are also discussed.