Strained Channel FET Transistor via Heat Treatment

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Solution Overview

Problem

Existing methods for producing strained-channel FET transistors, such as GAAFET, FinFET, and VFET, face challenges in achieving sufficient strain within the channel, particularly when fabricated on substrates with insulating materials or in 3D architectures, leading to reduced stress effects due to free surfaces and defective semiconductor growth.

Innovation Solution

A method involving the use of semiconductor materials with modifiable crystalline structures, subjected to heat treatment after forming source and drain regions, to alter their lattice parameters and induce stress in the channel, ensuring effective strain generation regardless of transistor architecture or substrate surface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If source and drain regions are produced by epitaxy from multiple growth fronts in GAAFET transistors, then the transistor architecture is achieved, but the semiconductor material becomes defective and non-monocrystalline, preventing sufficient strain generation

Engineering Contradiction:
Improvetransistor architectureVSAvoidsemiconductor material quality
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The method applies preliminary action by forming the source and drain regions with a semiconductor material that has a different lattice parameter than the channel material, then subsequently applying heat treatment to generate the desired strain. This preliminary configuration allows the material to be in a non-strained state during formation, avoiding defects, while the strain is introduced later through thermal expansion/contraction of the lattice structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the physical parameters of the semiconductor material by applying heat treatment that modifies the lattice parameter. The heat treatment causes thermal expansion or contraction of the source and drain regions, which have a different lattice parameter than the channel, thereby generating the desired tensile or compressive strain in the channel without requiring defective epitaxial growth.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If heat treatment is applied to modify crystalline structure, then lattice parameter is altered and strain is induced, but additional processing steps are required

Engineering Contradiction:
Improvestrain inductionVSAvoidprocessing steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The heat treatment process induces a phase transition or structural change in the semiconductor material's crystalline lattice. By heating the source and drain regions, the lattice parameter changes due to thermal expansion, and upon cooling, the lattice contracts, generating strain in the channel. This phase transition approach achieves precise strain control through temperature management.

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The invention directly exploits thermal expansion principles by applying heat treatment to the source and drain regions made of semiconductor material with a different lattice parameter than the channel. The thermal expansion during heating and subsequent contraction during cooling generates the desired strain in the channel, providing a straightforward physical mechanism for strain induction.

Inventive Principle:
Principle #37Thermal expansion

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for consistent and sufficient strain induction in the channel of FET transistors, enhancing their performance by modifying the lattice parameters of semiconductor materials through heat treatment, thereby improving charge carrier mobility across various transistor types and architectures.

Implementation Method 1

a heat treatment step, implemented after the formation of the second semiconductor portions and in particular after the ends of these second semiconductor portions opposite those located on the side of the channel are in contact with bearing surfaces, making it possible to trigger the modification of the crystalline structure of the semiconductor material

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Implementation Method 2

The lattice parameter of the semiconductor material of the second semiconductor portions is therefore changed by the heat treatment, causing a change in the volume of the second semiconductor portions and thus creating a stress in the channel

Methodology Applied
Scientific EffectLattice parameter modification: Deformation

Implementation Method 3

The lattice parameter of the semiconductor material of the second semiconductor portions is therefore changed by the heat treatment, causing a change in the volume of the second semiconductor portions and thus creating a stress in the channel

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentEP3502048B1Method for producing a fet transistor with strained channel
Publication Date: 2022.02.16 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP3502048B1 patent drawingFigure 1~2
  • EP3502048B1 patent drawingFigure 3~4
  • EP3502048B1 patent drawingFigure 5~6

AI summary

Method for making at least one FET transistor (100a, 100b) comprising: - making at least one first semiconductor portion (114) intended to form a channel of the FET transistor, - making second semiconductor portions (122, 124, 126) intended to form source and drain regions, such that the first semiconductor portion is disposed between first ends of the second semiconductor portions and that the second ends of the second semiconductor portions, opposite to the first ends, are in contact with support surfaces, and comprising at least one semiconductor material whose crystalline structure is capable of being modified when subjected to heat treatment; - heat treatment causing a modification of the crystalline structure of the semiconductor material of the second semiconductor portions and creating a stress (128) in the first semiconductor portion.