Strained-Channel Semiconductor Device Fabrication via Selective Implantation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in controlling device strain in IC manufacturing, which affects carrier mobility and device leakage, requiring methods to balance performance and power consumption across different applications.
Innovation Solution
A method for manufacturing IC devices that involves identifying high-strain and low-strain devices based on specific characteristics and processing requirements, using implantation and annealing processes to control strain, and performing source/drain epitaxy to form structures with tailored profiles, allowing for the production of both high-strain and low-strain devices on a single substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If device strain is increased to improve carrier mobility, then device performance is improved, but device leakage increases
Solution Approach 1:
The patent applies local quality by selectively applying strain to specific device regions through targeted implantation processes. Different areas of the substrate receive different strain levels based on their specific performance requirements, allowing high-performance regions to be strained while leakage-prone regions maintain lower strain levels. This spatial differentiation of strain characteristics resolves the contradiction between improving carrier mobility and controlling device leakage.
Solution Approach 2:
The patent utilizes parameter changes by varying implantation conditions (energy, dose, angle) and annealing parameters to precisely control the magnitude and distribution of strain in different device regions. By adjusting these process parameters, the strain level can be optimized for each specific application, enabling designers to balance performance improvement against leakage control on a per-device basis.
2Productivity
If IC device strain is increased to improve carrier mobility, then production efficiency is improved, but power consumption increases
Solution Approach 1:
The patent implements local quality by applying strain selectively to only those devices that require enhanced performance, rather than uniformly straining all devices on the substrate. This targeted approach improves productivity for high-performance applications while avoiding unnecessary strain-induced power consumption in devices where it is not required, thus resolving the contradiction between production efficiency and power consumption.
3Adaptability or versatility
If different strain levels are applied to different devices on a single substrate, then design flexibility is improved, but process complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the substrate into distinct device regions that receive different strain treatments through selective implantation. This allows independent optimization of each device type while maintaining a unified manufacturing process flow, thereby achieving design flexibility without proportionally increasing process complexity. The segmented approach enables tailored strain profiles for different applications within the same production batch.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables designers to balance the benefits of strained-channel devices with reduced power consumption, effectively managing tradeoffs between performance and leakage, thereby optimizing IC device manufacturing.
Implementation Method 1
performing an implantation process on the device region, thereby forming an amorphous region having an amorphous crystalline structure
Implementation Method 2
performing source/drain epitaxy after the recessing of the IC device substrate
Implementation Method 3
performing source/drain epitaxy after the recessing of the IC device substrate to form a source/drain structure within the source/drain recess
Data Source
AI summary
A method for controlling IC device strain and the devices thereby formed are disclosed. An exemplary embodiment includes receiving an IC device substrate having a device region corresponding to an IC device. An implantation process is performed on the device region forming an amorphous region within the device region. The IC device substrate is recessed to define a source/drain recess in the device region having a profile determined by the amorphous structure of the amorphous region. A source/drain epitaxy is then performed to form a source/drain structure within the source/drain recess.