Strained Channel Transistor with Segmented SiGe Source/Drain
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling integrated chip components due to short-channel effects caused by boron dopant out-diffusion from doped SiGe source/drain regions, which become significant at smaller feature sizes, affecting transistor performance and reliability.
Innovation Solution
A strained channel transistor device is formed with a doped strain-inducing source/drain region and an underlying un-doped strain-inducing region, where the un-doped region has varying germanium concentrations to control dopant diffusion, preventing short-channel effects while maintaining carrier mobility enhancement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If doped SiGe source/drain regions are used to induce compressive stress on the channel region, then carrier mobility is improved, but boron dopant out-diffusion occurs causing short-channel effects at smaller feature sizes
Solution Approach 1:
The source/drain region is segmented into multiple distinct regions: a first doped SiGe region providing compressive stress, a second doped SiGe region with different doping concentration, and an undoped SiGe region acting as a barrier. This segmentation allows each region to perform its specific function independently, maintaining stress while preventing dopant diffusion.
Solution Approach 2:
An undoped SiGe region is introduced as an intermediary layer between the doped SiGe source/drain regions. This undoped region acts as a diffusion barrier that prevents boron dopant out-diffusion while still maintaining the compressive stress in the channel region through the strained SiGe structure.
2Productivity
If feature size is reduced to continue scaling, then integration density is improved, but short-channel effects become more significant
Solution Approach 1:
Different regions of the source/drain structure are given different local qualities: the first and second doped SiGe regions have high doping concentrations for stress induction, while the intermediate undoped SiGe region has zero doping concentration for diffusion blocking. This local differentiation allows the structure to simultaneously achieve high integration density and maintain transistor performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces short-channel effects and maintains suitable stress on the channel region for improved carrier mobility, enhancing transistor performance and reliability at advanced technology nodes.
Implementation Method 1
short-channel effects caused by boron dopant out-diffusion from doped SiGe source/drain regions
Implementation Method 2
by inducing a compressive stress onto a channel region of a PMOS transistor, the mobility and performance of the transistor is improved
Data Source
AI summary
A transistor device includes a gate structure disposed over a channel region of a semiconductor substrate. A source/drain recess is arranged in the semiconductor substrate alongside the gate structure. A doped silicon-germanium (SiGe) region is disposed within the source/drain recess and has a doping type which is opposite to that of the channel. An un-doped SiGe region is also disposed within the source/drain recess. The un-doped SiGe region underlies the doped SiGe region and comprises different germanium concentrations at different locations within the source/drain recess.