Strained Semiconductor Die Attach Using Thermal Expansion Stress
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Solution Overview
Problem
Current methods for generating strained semiconductor devices face challenges such as high manufacturing complexity, scalability issues, and incompatibility with industrial-scale packaging processes, particularly when applying external mechanical stresses.
Innovation Solution
A process that introduces mechanical stresses in semiconductor devices during back-end manufacturing steps, utilizing a die-attach technique with a support having different thermal expansion coefficients and applying external mechanical loads to generate biaxial or uniaxial stresses, which are compatible with packaging processes and maintain stress throughout the device's operating temperature range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If substrate-level stress techniques are used to generate stresses over the entire die, then electrical performance is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies local quality by transitioning from global substrate-level stress to localized stress application. Individual stressor elements are positioned at specific locations around transistor channels to apply stress locally where needed, rather than stressing the entire die uniformly. This reduces manufacturing complexity while maintaining electrical performance improvements.
Solution Approach 2:
The patent segments the stress application system into multiple independent stressor elements (such as separate silicon nitride layers or individual piezoelectric actuators) that can be controlled independently. This segmentation allows for simplified manufacturing compared to global stress techniques, as each element can be fabricated and positioned separately using standard CMOS-compatible processes.
2Reliability
If manufacturing process techniques are used to generate local stresses, then electrical performance is improved, but additional front-end manufacturing steps are required
Solution Approach 1:
The patent applies preliminary action by incorporating stressor elements during the manufacturing process itself, but positioning them for later activation. Stressor elements such as silicon nitride layers are deposited and structured in advance, but the actual stress application occurs after transistor fabrication is complete. This allows front-end processes to remain unchanged while enabling stress application in the back-end.
Solution Approach 2:
The patent introduces dynamic stress application through controllable stressor elements such as piezoelectric actuators or mechanically actuated structures. These elements can apply stress on-demand after fabrication, allowing the stress state to be changed dynamically without requiring additional front-end manufacturing steps. This separates the fabrication process from the stress application process.
3Productivity
If external mechanical stress techniques are used at the end of manufacturing, then scalability is improved, but compatibility with packaging processes deteriorates
Solution Approach 1:
The patent introduces intermediary structures such as compliant layers, stress transfer layers, or packaged-integrated stressors that mediate between the external stress application mechanism and the semiconductor die. These intermediaries protect the die during packaging processes while still enabling stress application, thus improving compatibility with standard packaging workflows while maintaining scalability.
Solution Approach 2:
The patent applies the nesting principle by integrating stressor elements within the package structure itself. For example, piezoelectric actuators or mechanical stressors are incorporated into the package substrate or housing, allowing stress application to be embedded within the packaging process rather than requiring separate external equipment. This improves both scalability and packaging compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the generation of permanent mechanical stresses in semiconductor devices without altering the front-end manufacturing process, enabling improved electrical performance and scalability, while being compatible with industrial packaging processes.
Implementation Method 1
a support structure, having a different thermal expansion coefficient than the semiconductor material
Implementation Method 2
a piezoelectric material provided in said support structure, said piezoelectric material being capable of generating a stress in said semiconductor material when a voltage is applied across said piezoelectric material
Data Source
AI summary
A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature. Furthermore, additional stress can be enhanced by means of different embodiments involving the support, such as ring or multi-layer frame.