Strained FinFET Strain Retention via Delayed Fin Cutting

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in fabricating FinFETs is the significant loss of induced strain in vertical fins due to elastic relaxation when they are cut before forming gate structures and other anchoring components, leading to reduced performance in scaled device components.

Innovation Solution

The method involves forming gate structures and insulating layers on the fin before performing a fin cut, anchoring the fin and maintaining its strained state by delaying the sectioning until after gate structure fabrication, and using a sequence of fabrication steps that includes forming strained silicon-germanium or silicon vertical fins and selectively removing source/drain contacts to form trenches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the fin is cut before forming gate structures and anchoring components, then the fabrication process can proceed with simpler initial steps, but the induced strain in the vertical fin is significantly lost due to elastic relaxation

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidstrain retention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The fin is cut before forming gate structures and anchoring components, but this preliminary cutting action is followed by subsequent formation of these anchoring structures that prevent strain relaxation. The cutting is performed early, but the strain is preserved through the later formation of gate structures that anchor the fin segments.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If the fin is cut early in the fabrication process, then device component formation becomes easier, but the performance of scaled device components is reduced due to strain loss

Engineering Contradiction:
Improvedevice component formationVSAvoidstrain state maintenance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The fin cutting is performed as a preliminary action before forming gate structures, source/drain regions, and other components. This early cutting simplifies subsequent device formation, while the later formation of anchoring structures ensures strain is maintained throughout the fabrication process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The material composition of the fin is changed by forming alloy segments (such as SiGe) with different lattice constants than the channel material. This compositional parameter change creates and maintains strain in the channel region even after the fin is cut, compensating for the elastic relaxation that would otherwise occur.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes strain relaxation, allowing for the retention of induced strain in the vertical fins, enhancing the performance of FinFET devices by maintaining the fin in a strained state throughout the fabrication process.

Implementation Method 1

The challenge in fabricating FinFETs is the significant loss of induced strain in vertical fins due to elastic relaxation when they are cut before forming gate structures and other anchoring components

Methodology Applied
Scientific EffectElastic relaxation: Elasticity

Data Source

PatentUS10446647B2Approach to minimization of strain loss in strained fin field effect transistors
Publication Date: 2019.10.15 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US10446647B2 patent drawing
  • US10446647B2 patent drawing
  • US10446647B2 patent drawing

AI summary

A method of fabricating a vertical fin field effect transistor with a strained channel, including, forming a strained vertical fin on a substrate, forming a plurality of gate structures on the strained vertical fin, forming an interlevel dielectric on the strained vertical fin, forming a source/drain contact on the vertical fin adjacent to each of the plurality of gate structures, and selectively removing one or more of the source/drain contacts to form a trench adjacent to a gate structure.