Strained FinFET Protective Cap Layer for Strain Preservation
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Solution Overview
Problem
Conventional finFET semiconductor devices using silicon germanium (SiGe) fins experience significant strain relaxation during gate stack formation, leading to degraded device performance due to etching processes that reduce the compressive strain in the source/drain regions, resulting in lower hole mobility.
Innovation Solution
Incorporating a protective silicon cap layer on top of the SiGe fin to prevent etching and preserve the compressive strain, allowing the formation of a gate stack that maintains the strained active semiconductor portion, thereby preventing strain relaxation and enhancing hole mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form gate stacks, then gate structure can be formed, but compressive strain in the SiGe fin is relaxed significantly (up to 50% loss)
Solution Approach 1:
A protective cap layer is introduced as an intermediary between the etching process and the SiGe fin. This cap layer selectively protects the SiGe fin from etching while allowing the gate stack to be formed, thereby preventing strain relaxation without compromising manufacturing feasibility
Solution Approach 2:
The protective cap layer is formed on the SiGe fin before the gate stack formation process begins. This preliminary protective action ensures that the fin structure is preserved throughout subsequent etching steps, maintaining compressive strain while enabling gate stack fabrication
2Reliability
If SiGe fins are used to enhance hole mobility, then device performance improves, but etching processes cause strain relaxation that degrades this benefit
Solution Approach 1:
The protective cap layer converts the potentially harmful etching process into a beneficial selective process. The cap layer is designed to be etched away after serving its protective function, allowing the gate stack to be formed while the SiGe fin remains strain-preserving, thus converting the harm of etching into the benefit of selective protection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively doubles the hole mobility of SiGe finFET devices and increases effective current flow by approximately 25% compared to conventional devices, by fully preserving the strain in the SiGe fin.
Implementation Method 1
a SiGe layer becomes compressively strained as a result of the lattice matching of Ge atoms to Si atoms in the substrate
Implementation Method 2
The etching process used to pattern form the dummy gate element also recesses the height of the SiGe fin
Implementation Method 3
by epitaxial growth of a SiGe layer on a silicon substrate, wherein the SiGe layer becomes compressively strained
Data Source
AI summary
A semiconductor device includes at least one semiconductor fin on an upper surface of a base substrate. The at least one semiconductor fin includes a strained active semiconductor portion interposed between a protective cap layer and the base substrate. A gate stack wraps around the at least one semiconductor fin. The gate stack includes a metal gate element interposed between a pair of first cap segments of the protective cap layer. The strained active semiconductor portion is preserved following formation of the fin via the protective cap layer.