Strained FinFET Channels With SiGe Capping for Threshold Tuning
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Solution Overview
Problem
FinFET technologies face challenges in scaling down due to constraints on threshold voltage tuning and increased transistor mismatch performance, particularly with narrower fin widths and higher doping concentrations, which affect the stability and performance of complementary FinFET devices.
Innovation Solution
A complementary FinFET device is proposed with a silicon germanium channel capping layer that wraps the channel region of the silicon fin, formed during the gate replacement process, to minimize detrimental effects from subsequent thermal processes and prevent out-diffusion of germanium, thereby maintaining high mobility strained channels and reducing transistor mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If subsequent processing is performed after forming high mobility strained channels, then device fabrication can be completed, but strain and desired characteristics of the channel materials are adversely affected
Solution Approach 1:
The patent introduces a capping layer formation step performed immediately after channel material deposition and before subsequent processing steps. This preliminary action protects the strain characteristics of the channel materials from being adversely affected by subsequent processing operations such as thermal treatments and additional depositions.
Solution Approach 2:
The capping layer serves as an intermediary protective layer between the channel materials and the subsequent processing environment. This intermediate layer prevents direct interaction between the processing conditions and the channel materials, thereby preserving the strain and desired characteristics of the channel materials while allowing subsequent fabrication steps to proceed.
2Ease of manufacture
If thermal processes are applied to complete fabrication, then subsequent processing can be performed, but out-diffusion of germanium occurs and degrades channel performance
Solution Approach 1:
The capping layer acts as a diffusion barrier that prevents germanium atoms from migrating out of the channel region during thermal processing steps. This intermediary layer maintains the germanium concentration profile and prevents out-diffusion, thereby preserving channel performance reliability even when thermal processes are applied for fabrication completion.
Solution Approach 2:
The capping layer is formed in advance to counteract the harmful effect of germanium out-diffusion that would occur during subsequent thermal processes. This preliminary protective measure prevents the degradation of channel performance before it can happen during fabrication.
3Ease of operation
If gate layers are used for threshold voltage tuning, then device functionality is achieved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent modifies the local composition and properties of the capping layer in the channel region to provide threshold voltage tuning capability. By adjusting the composition (e.g., silicon germanium with specific germanium concentrations) and thickness of the capping layer locally over the channel, the desired electrical characteristics are achieved without requiring complex multi-layer gate structures.
Solution Approach 2:
The capping layer serves multiple functions: it protects the channel materials from subsequent processing, prevents germanium out-diffusion during thermal processes, and provides threshold voltage tuning capability. This multi-functionality reduces the need for separate gate layers and simplifies the overall device structure while maintaining ease of operation for threshold voltage control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates threshold voltage tuning for both p-type and n-type FinFETs without relying heavily on gate layers, enhancing performance and stability by minimizing thermal exposure and strain relaxation, thus improving the on-to-off current ratio and reducing leakage.
Implementation Method 1
A channel capping layer is disposed between the gate structure and the first channel region of the first silicon fin... to prevent out-diffusion of germanium
Implementation Method 2
maintaining high mobility strained channels... by minimizing thermal exposure and strain relaxation
Data Source
AI summary
Fin-like field effect transistors (FinFETs) having high mobility strained channels and methods of fabrication thereof are disclosed herein. An exemplary method includes forming a first silicon fin in a first type FinFET device region and a second silicon fin in a second type FinFET device region. First epitaxial source/drain features and second epitaxial source/drain features are formed respectively over first source/drain regions of the first silicon fin second source/drain regions of the second silicon fin. A gate replacement process is performed to form a gate structure over a first channel region of the first silicon fin and a second channel region of the second silicon fin. During the gate replacement process, a masking layer covers the second channel region of the second silicon fin when a silicon germanium channel capping layer is formed over the first channel region of the first silicon fin.