Strained-Channel FinFET Structure Using Cut SiGe Stress Layers
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Solution Overview
Problem
Conventional epitaxial growth of SiGe for finFETs induces strain that causes dislocations or defects, affecting device performance and requiring thick epitaxial layers that complicate manufacturing.
Innovation Solution
A method involving a thin strain-inducing layer, such as SiGe, deposited on a Si substrate, with a second semiconductor layer patterned to form a fin. The strain-inducing layer is then cut or etched near the fin to relieve its strain, imparting strain to the adjacent fin layer without generating defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional epitaxial growth of SiGe is used to induce strain in finFETs, then strain is induced to improve carrier mobility, but dislocations and defects are generated that degrade device performance
Solution Approach 1:
The structure is segmented into distinct layers: a thin SiGe strain-inducing layer (10-60 nm) deposited on the substrate, and an adjacent Si device layer where the finFET is formed. This segmentation allows the SiGe layer to induce strain without directly becoming the device channel, isolating the defect generation zone from the active device region.
Solution Approach 2:
The harmful strain-induced defects are extracted or removed by etching away the SiGe strain-inducing layer after strain has been transferred to the Si device layer. This eliminates the source of dislocations and defects while preserving the beneficial strain in the finFET channel.
2Stability of the object's composition
If thick epitaxial layers are used to accommodate strain, then strain can be maintained, but manufacturing complexity increases
Solution Approach 1:
The thickness parameter of the SiGe strain-inducing layer is optimized to be thin (10-60 nm), which is sufficient to induce strain in the adjacent Si layer but thin enough to allow complete etching removal without affecting the underlying substrate or requiring complex manufacturing steps. This parameter change simplifies the overall manufacturing process.
3Ease of manufacture
If the strain-inducing layer is made thin, then manufacturing is simplified and defects are reduced, but strain relief through cutting may be insufficient
Solution Approach 1:
The SiGe strain-inducing layer is preliminarily deposited and strained before the Si device layer is fully processed. The strain is transferred to the Si layer during subsequent processing steps, and then the SiGe layer is etched away to relieve its strain. This preliminary action sequence ensures effective strain transfer while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the induction of strain in finFETs without generating defects, improving electron and hole mobility, and simplifying the manufacturing process by avoiding thick epitaxial layers.
Implementation Method 1
The strain-inducing layer may be thin (e.g., between approximately 10 nm and 60 nm in some embodiments) such that strain in the layer is relieved by elastic relaxation rather than plastic relaxation, so that defects are not generated at unacceptable levels.
Data Source
AI summary
Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.