Strained Germanium Channel CMOS via Seed Layer Composition

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Solution Overview

Problem

Current CMOS manufacturing methods require complex processes to achieve both tensely strained and compressively strained channel structures using different channel materials, whereas the goal is to manufacture these structures with the same channel material on a substrate in a less complex manner.

Innovation Solution

A method involving the growth of a common strain relaxed buffer layer and channel layer on a silicon substrate, utilizing trenches and seed layers to achieve tensile or compressive strain in nMOS and pMOS regions respectively, with the strain relaxed buffer layer comprising silicon germanium and the channel layer made of germanium, allowing for the same channel material to be used for both strain types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If different channel materials are used for tensely strained and compressively strained channel structures, then the strain control is effective, but the manufacturing process becomes complex

Engineering Contradiction:
Improvestrain controlVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by using different seed layer compositions (e.g., SiGe with different Ge percentages) in different regions (nMOS vs pMOS) to achieve different strain states in the common Ge channel layer. This allows localized strain control without changing the channel material itself, resolving the contradiction between effective strain control and manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the composition parameter of the seed layer (varying Ge content in SiGe) to control the strain state of the channel. By adjusting the seed layer's material composition rather than changing the channel material, the patent achieves different strain states while maintaining a common channel material, thus reducing manufacturing complexity while preserving strain control effectiveness.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the same channel material is used for both tensely strained and compressively strained structures, then the manufacturing process is simplified, but achieving both strain types becomes difficult

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidstrain control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary element - the seed layer - that mediates between the substrate and the common channel material. The seed layer's varying composition allows it to impose different strain states on the identical Ge channel layer in different regions, enabling both tensile and compressive strain with the same channel material while simplifying manufacturing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the strain control mechanism by separating the strain induction function from the channel conduction function. The seed layer handles strain induction through composition variation, while the common Ge channel layer handles carrier transport. This segmentation allows the same channel material to serve both tensile and compressive strain regions effectively.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the manufacturing process by using the same channel material for both strained types, ensuring effective strain control and maintaining off-current levels, while being scalable for future device nodes.

Implementation Method 1

the properties of the first seed layer and the common strained relaxed buffer layer are predetermined such that the common channel layer comprises tensile strain or is unstrained in the nMOS region and comprises compressive strain in the pMOS region

Methodology Applied
Scientific EffectLattice mismatch strain:

Data Source

PatentEP2978016B1A method for providing an nMOS device and a pMOS device on a silicon substrate and silicon substrate comprising an nMOS device and a pMOS device
Publication Date: 2018.06.13 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • EP2978016B1 patent drawingFigure 1
  • EP2978016B1 patent drawingFigure 2a~2
  • EP2978016B1 patent drawingFigure 3

AI summary

A method for providing an nMOS device and a pMOS device on a silicon substrate, comprising: a. providing trenches in a dielectric layer on the silicon substrate, at least a first trench defining an nMOS region and a second trench defining a pMOS region, the trenches extending through the dielectric layer and abutting a surface of the substrate; b. growing a first seed layer in the first trench on the surface; c. growing a common strain relaxed buffer layer in the first and the second trench, the strain relaxed buffer layer comprising silicon germanium; d. growing a common channel layer comprising germanium (Ge) in the first trench and the second trench on the common strain relaxed buffer layer; wherein the properties of the first seed layer an the common strained relaxed buffer layer are predetermined such that the common channel layer comprises tensile strain or is unstrained in the nMOS region and comprises compressive strain in the pMOS region; and associated substrate.