Multiple-Gate Transistors With Strained Germanium Channels
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Solution Overview
Problem
As semiconductor devices are scaled down, maintaining performance is challenging due to defects like threading dislocations that arise from growing germanium layers on silicon substrates, which degrade the electrical properties of germanium-based transistors.
Innovation Solution
A multiple-gate transistor design is implemented with a germanium active region grown using selective epitaxial growth, where the germanium layer is compressively strained to fit the silicon substrate, and threading dislocations are trapped at the bottom, allowing the upper portion to be free of defects and maintain a specific crystal orientation, improving electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If germanium layer is grown on silicon substrate through epitaxial growth, then higher carrier mobility and better electrical properties are achieved, but threading dislocations are formed that degrade transistor performance
Solution Approach 1:
The patent segments the germanium layer into multiple thinner layers grown in sequential steps, with each layer being thinner than the critical thickness that would cause dislocation formation. This segmentation prevents the accumulation of strain that leads to threading dislocations while still achieving the desired thick germanium structure for high carrier mobility.
Solution Approach 2:
The patent applies preliminary strain management by growing intermediate layers and performing controlled relaxation steps before completing the full germanium thickness. This preliminary action prevents dislocation formation during the epitaxial growth process by managing strain accumulation proactively.
2Productivity
If germanium layer thickness is increased to improve drive current, then higher carrier mobility is achieved, but threading dislocations form more frequently
Solution Approach 1:
The patent divides the thick germanium layer into multiple sub-layers, each grown to a thickness below the critical dislocation threshold. This allows the total germanium thickness to be increased for higher drive current while preventing dislocation formation through the segmented growth approach.
Solution Approach 2:
The patent changes the growth parameters by controlling the thickness of each individual germanium layer, the growth rate, and the temperature conditions during epitaxial growth. These parameter changes enable thicker total germanium thickness for higher current while maintaining dislocation-free quality through optimized growth conditions.
3Speed
If germanium is used instead of silicon, then higher electron mobility and smaller gate delay are achieved, but the cost of wafers increases significantly
Solution Approach 1:
The patent uses silicon-germanium intermediate layers as a mediator between silicon substrate and pure germanium active regions. This intermediary approach enables the use of expensive germanium only where it provides the most benefit (in the channel region for high mobility) while maintaining compatibility with standard silicon substrate infrastructure, thereby reducing overall cost compared to pure germanium wafers.
Solution Approach 2:
The patent creates a composite structure combining silicon substrate with germanium active regions and silicon-germanium intermediate layers. This composite material approach leverages the low cost of silicon substrates while incorporating germanium's high mobility properties only in the critical channel region, achieving a cost-effective balance between performance and manufacturing cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical properties of germanium-based transistors by reducing threading dislocations in the upper channel region, leading to improved drive current and smaller gate delay, while being compatible with existing silicon substrate technology.
Implementation Method 1
Growing a germanium layer on a silicon substrate is commonly referred to as germanium-silicon hetero-epitaxial growth
Implementation Method 2
The lattice constant of germanium is about 4.2% more than the lattice constant of silicon. When a germanium layer is grown on a silicon substrate, the germanium layer is compressively strained to fit the lattice spacing of the silicon substrate
Implementation Method 3
After the germanium layer is grown more than a critical thickness, the strain may be relieved by forming a variety of threading dislocations
Data Source
AI summary
A method comprises etching away an upper portion of a substrate to form a trench between two adjacent isolation regions, wherein the substrate has a first crystal orientation and is formed of a first semiconductor material, growing a first semiconductor region in the trench over the substrate, wherein the first semiconductor region is formed of a second semiconductor material and an upper portion of the first semiconductor region has a second crystal orientation and growing a second semiconductor region over the first semiconductor region, wherein the second semiconductor region is formed of a third semiconductor material.