Strained Channel MOS Transistor Manufacturing via Sacrificial Gate Trenches

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Solution Overview

Problem

Existing methods for manufacturing strained-channel MOS transistors are complex and require a significant number of additional manufacturing steps, making them inefficient compared to conventional methods.

Innovation Solution

A method involving the formation of a MOS transistor with a sacrificial gate, followed by etching to create trenches and filling them with a material capable of straining the substrate, which allows for the formation of strained-channel transistors with minimal additional steps and compatibility with different gate materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If known methods are used to apply local strain on the channel, then carrier mobility is improved, but the manufacturing process becomes complex with a significant number of additional steps

Engineering Contradiction:
Improvecarrier mobilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A sacrificial gate is formed in advance before the strain application process. This preliminary structure enables subsequent strain material deposition and trench formation without requiring complex post-processing steps, thereby improving carrier mobility while limiting manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A dielectric material layer is introduced as an intermediary between the sacrificial gate and the strain material. This intermediate layer facilitates controlled strain application by being etched away to create trenches that guide strain material deposition, achieving effective strain application with manageable process steps

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If known methods are used to apply local strain on the channel, then carrier mobility is improved, but the number of additional manufacturing steps increases significantly

Engineering Contradiction:
Improvecarrier mobilityVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The method combines multiple functions into integrated process steps: the sacrificial gate serves both as a structural element and a template for subsequent strain material placement. The dielectric layer etching and strain material deposition are merged into a sequential process that achieves strain application without requiring separate complex manufacturing stages

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The manufacturing process is segmented into distinct, manageable stages: sacrificial gate formation, dielectric layer deposition, selective etching to create trenches, and strain material filling. This segmentation allows each step to be optimized independently while maintaining overall process efficiency and achieving improved carrier mobility

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the production of strained-channel MOS transistors, enabling the formation of both strained and unstrained channel transistors on the same substrate with optimal carrier mobility, while reducing the number of additional manufacturing steps and allowing for the use of different gate materials.

Implementation Method 1

filling the trenches with a material capable of straining the substrate

Methodology Applied
Scientific EffectStrain: Deformation

Data Source

PatentUS8530292B2Method for manufacturing a strained channel MOS transistor
Publication Date: 2013.09.10 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US8530292B2 patent drawing
  • US8530292B2 patent drawing
  • US8530292B2 patent drawing

AI summary

A method for manufacturing a strained channel MOS transistor including the steps of: forming, at the surface of a semiconductor substrate, a MOS transistor comprising source and drain regions and an insulated sacrificial gate which partly extends over insulation areas surrounding the transistor; forming a layer of a dielectric material having its upper surface level with the upper surface of the sacrificial gate; removing the sacrificial gate; etching at least an upper portion of the exposed insulation areas to form trenches therein; filling the trenches with a material capable of applying a strain to the substrate; and forming, in the space left free by the sacrificial gate, an insulated MOS transistor gate.