Strained Nanosheet Transistor with Multi-Segment Source/Drain
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Solution Overview
Problem
Current semiconductor device fabrication techniques face challenges in introducing sufficient strain to the channel regions of nanosheet transistors, which limits improvements in carrier mobility, switching speed, and energy consumption due to strain relaxation during processing.
Innovation Solution
The method involves forming a nanosheet stack with alternating channel and sacrificial layers, followed by creating multi-segmented source/drain regions where the first portion is doped with the same material as the channel and the second portion is doped with a different material, maintaining strain by merging these regions to act as a template and stressor, respectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional single-material source/drain regions are used, then the fabrication process is simple, but strain relaxation occurs during processing which limits carrier mobility improvement
Solution Approach 1:
The source/drain region is divided into multiple segments with different materials: a first source/drain region (e.g., SiGe) adjacent to the channel and a second source/drain region (e.g., Si). This segmentation allows the first region to provide strain to the channel while the second region provides a lattice match template, preventing strain relaxation and maintaining high carrier mobility.
Solution Approach 2:
The source/drain structure uses composite materials with different lattice constants - SiGe (with higher germanium content) in the first region adjacent to the channel to induce tensile strain, and Si or lower Ge-content SiGe in the second region to provide a template that prevents strain relaxation. This composite approach simultaneously achieves strain induction and strain preservation.
2Reliability
If strain is introduced to the channel, then carrier mobility improves, but strain relaxation during processing reduces the effectiveness
Solution Approach 1:
The first source/drain region with higher Ge content is formed adjacent to the channel before completing the source/drain structure. This preliminary placement of the strain-inducing material ensures that strain is applied to the channel at the optimal stage, and the subsequent formation of the second source/drain region with matching lattice constant locks in this strain state.
Solution Approach 2:
The second source/drain region acts as an intermediary element between the first source/drain region and the rest of the device structure. It provides a lattice-matched template that mediates the strain state, preventing strain relaxation while allowing the first region to maintain its strain-inducing properties adjacent to the channel.
3Reliability
If multi-segmented source/drain regions with different materials are used, then strain is preserved in the channel, but the fabrication process becomes more complex
Solution Approach 1:
The fabrication process controls the germanium content parameter in different source/drain regions - the first region has higher Ge content (e.g., 5-50%) to induce strain, while the second region has lower or zero Ge content to provide lattice matching. This parameter variation is achieved through selective deposition or epitaxial growth conditions, allowing strain preservation with manageable process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively induces and preserves strain in the channel layers, enhancing electron and hole mobility, thereby improving transistor performance characteristics such as carrier mobility and switching speed.
Implementation Method 1
a material is 'strained' when its atoms have been stretched or compressed outside of their normal inter-atomic distances
Implementation Method 2
forming first portions of the S/D regions on portions of the nanosheet stack; forming second portions of the S/D regions, wherein the first portions are different than the second portions
Data Source
AI summary
Provided are embodiments of a method for forming a semiconductor device. The method includes forming a nanosheet stack on a substrate, wherein the nanosheet stack comprises channel layers and nanosheet layers, forming a sacrificial gate over the nanosheet stack, and forming trenches to expose sidewalls of the nanosheet stack. The method also includes forming source/drain (S/D) regions, where forming the S/D regions including forming first portions of the S/D regions on portions of the nano sheet stack, forming second portions of the S/D regions, wherein the first portions are different than the second portions, and replacing the sacrificial gate with a conductive gate material. Also provided are embodiments of a semiconductor device formed by the method described herein.