Strained Quantum Well Channel Reducing Surface Roughness Scattering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current integrated circuit devices face challenges in reducing surface roughness scattering, which hinders carrier mobility, despite the use of strained channel regions.
Innovation Solution
Incorporating a quantum well channel region with a specific well thickness and a barrier layer with a greater bandgap, lattice-matched to the channel region, to induce strain-induced splitting of electron conduction states, thereby reducing surface roughness scattering. This includes using materials like silicon or SiGe with a (100) crystal orientation and a barrier layer such as zinc sulfide (ZnS), and applying techniques like Atomic Layer Deposition to define the well thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If strained channel regions are used to increase carrier mobility, then carrier mobility is improved, but surface roughness scattering remains a limiting factor
Solution Approach 1:
The patent changes the physical parameters of the channel region by introducing strain through lattice-matched barrier layers (such as ZnS on SiGe). This strain modifies the band structure and splits the conduction band minima, creating unequal energy levels that reduce surface roughness scattering effects while maintaining high carrier mobility in the bulk channel region.
Solution Approach 2:
The patent employs composite material structures combining different semiconductor layers (Si, SiGe, ZnS) with specific lattice matching properties. The barrier layer and channel region form a composite system where the barrier induces strain in the channel, achieving both high mobility and reduced surface scattering through the synergistic interaction of materials with different elastic and electronic properties.
2Object-affected harmful factors
If quantum well channel region with specific well thickness is used to induce strain-induced splitting, then surface roughness scattering is reduced, but device structure complexity increases
Solution Approach 1:
The patent segments the channel region into a quantum well structure with specific thickness (e.g., 27 or 34 crystal layers) bounded by barrier layers. This segmentation creates discrete quantum states and strain-induced energy level splitting that selectively suppress surface roughness scattering while maintaining controllable device fabrication processes.
Solution Approach 2:
The patent applies local quality by creating a quantum well channel region with specific thickness and material composition only where needed to induce strain splitting. The barrier layers are positioned specifically at interfaces to provide the necessary strain field, while the bulk channel maintains optimal properties for carrier transport, achieving localized optimization without overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces surface roughness scattering by creating unequal energy levels, leading to enhanced carrier mobility and improved performance in transistors like UTB-SOI and Fin-FETs, as demonstrated by specific well thicknesses corresponding to 27 or 34 crystal layers.
Implementation Method 1
a quantum well channel region having a well thickness Tw sufficient to yield a strain-induced splitting of a plurality of equivalent-type electron conduction states therein to respective unequal energy levels
Implementation Method 2
a barrier layer having a bandgap greater than a bandgap of the channel region. The barrier layer may be lattice matched to the channel region at an interface therebetween
Data Source
AI summary
Integrated circuit devices including strained channel regions and methods of forming the same are provided. The integrated circuit devices may include enhancement-mode field effect transistors. The enhancement-mode field effect transistors may include a quantum well channel region having a well thickness Tw sufficient to yield a strain-induced splitting of a plurality of equivalent-type electron conduction states therein to respective unequal energy levels including a lowermost energy level associated with a lowermost surface roughness scattering adjacent a surface of the channel region when, the surface is biased into a state of inversion.