Strained Semiconductor Blocks via Epitaxial Growth
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for creating strained semiconducting zones in transistors face challenges with elastic relaxation and strain uniformity, particularly in uniaxial stress configurations, where active zones with different widths lead to inconsistent mobility and current density due to edge relaxation.
Innovation Solution
A method involving a substrate with oblong semiconducting portions and a masking layer, where a second semiconducting material with a different mesh parameter is grown to form strained blocks, ensuring elastic relaxation occurs orthogonally to the growth direction, and uniaxial strain is achieved by controlling the width and length of these portions and the masking layer to minimize plastic relaxation and crystalline defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If biaxial mechanical strain is applied to semiconducting layer, then charge carrier velocity increases, but elastic relaxation occurs at edges causing non-uniform strain distribution
Solution Approach 1:
The patent segments the continuous biaxial strained layer into discrete uniaxial strained zones separated by relaxed regions. This segmentation prevents edge relaxation from propagating across the entire structure, maintaining strain uniformity within each active zone while allowing controlled relaxation in separating regions.
Solution Approach 2:
The patent applies different strain characteristics to different spatial locations: uniaxial strain is maintained in active transistor zones while elastic relaxation is permitted in separating zones. This local differentiation ensures high strain uniformity where needed while managing overall stress distribution.
2Reliability
If compressive stress is applied for hole transport, then hole mobility improves, but tensile stress is needed for electron transport above 1.4 GPa
Solution Approach 1:
The patent implements spatially differentiated strain orientations where compressive uniaxial strain is applied to regions hosting PMOS transistors (for optimal hole transport) while tensile uniaxial strain is applied to regions hosting NMOS transistors (for optimal electron transport). This allows each transistor type to benefit from its optimal stress condition.
Solution Approach 2:
The patent divides the semiconducting layer into separate zones with different strain orientations, allowing independent optimization for electron and hole transport without compromising the other carrier type's performance.
3Adaptability or versatility
If active zones with different widths are created, then device design flexibility increases, but average strain and mobility become dependent on zone width
Solution Approach 1:
The patent introduces separating unrelaxed zones between active zones of different widths. These separating zones act as buffers that prevent strain redistribution and edge relaxation effects from affecting adjacent active zones, thereby maintaining consistent strain and mobility characteristics across zones with varying dimensions.
Solution Approach 2:
The separating zones function as intermediary regions that mediate between active zones of different widths. By providing a controlled transition region with specific strain characteristics, they prevent direct interaction between edge relaxation effects from adjacent active zones, ensuring mobility consistency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of semiconducting regions with consistent uniaxial strain, enhancing transistor performance by maintaining strain uniformity and reducing defects, thereby improving charge carrier mobility and current density.
Implementation Method 1
making a second semiconducting material grow with a mesh parameter different from the mesh parameter of the first semiconducting material, so as to form one or several semiconducting blocks strained along the first direction, on said one or several first oblong semiconducting portions
Implementation Method 2
Due to the oblong shape of the semiconducting portions on which growth takes place, relaxation functions in a direction orthogonal to the first direction
Implementation Method 3
A mechanical strain refers to a material with crystalline mesh parameter(s) longer than or shorter than a nominal mesh parameter... A mechanical strain in tension or in compression on a semiconducting layer can induce an increase in the velocity of charge carriers
Data Source
AI summary
The method of manufacturing a structure comprising one or several strained semiconducting zones capable of forming one or several transistor channel regions, the method including the following steps:a) providing a substrate coated with a masking layer wherein there are one or several first slits exposing one or several first oblong semiconducting portions made of a first semiconducting material and extending in a first direction,b) making a second semiconducting material grow with a mesh parameter different from the mesh parameter of the first semiconducting material, so as to form one or several first semiconducting blocks strained along the first direction, on said one or several first oblong semiconducting portions.