Strained Semiconductor Devices with Facets
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Solution Overview
Problem
The challenge in semiconductor device fabrication is achieving enhanced carrier mobility due to difficulties in delivering a given amount of strain into the channel region, leading to device instability and potential failure, especially as gate length and spacing decrease in CMOS technology.
Innovation Solution
A method for fabricating a semiconductor device with a strained structure involves forming source and drain recess cavities using biased dry etching and wet etching to create specific crystal plane facets, followed by selective growth of silicon germanium using LPCVD at optimized temperature and pressure conditions to confine compressive stress effectively within the channel region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If strained materials are used in source and drain recess cavities to enhance carrier mobility, then device performance is improved, but the ability to deliver sufficient strain into the channel region deteriorates due to scaling effects
Solution Approach 1:
The patent applies local quality by creating facets with specific crystal orientations ((111) and (311) planes) at localized positions within the source and drain recess cavities. These facets are positioned adjacent to the channel region to maximize strain delivery where needed. The selective growth of silicon germanium on these specifically oriented facets creates localized strain fields that effectively penetrate into the channel region, resolving the contradiction between enhancing carrier mobility and maintaining strain delivery precision in scaled devices.
2Productivity
If gate length and spacing are decreased to scale down device dimensions, then device density is improved, but the delivery of strain into the channel region deteriorates
Solution Approach 1:
The patent employs parameter changes by controlling the crystal orientation parameters of the facets through selective etching and growth processes. By creating facets with specific orientations ((111) and (311) planes) and controlling the silicon germanium growth parameters on these facets, the patent achieves effective strain delivery even in scaled-down devices with reduced gate length and spacing. This allows device density to increase while maintaining the reliability of strain delivery into the channel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the delivery of a given amount of strain into the channel region, enhancing carrier mobility and improving device performance by optimizing the growth of strained material within the recess cavities, thereby reducing instability and failure risks.
Implementation Method 1
selective growth of silicon germanium using LPCVD
Implementation Method 2
forming source and drain recess cavities using biased dry etching
Data Source
AI summary
A method for fabricating a semiconductor device, the method includes forming a gate stack over a major surface of a substrate. The method further includes recessing the substrate to form source and drain recess cavities adjacent to the gate stack in the substrate. The method further includes selectively growing a strained material in the source and drain recess cavities in the substrate using an LPCVD process, wherein the LPCVD process is performed at a temperature of about 660 to 700° C. and under a pressure of about 13 to 50 Torr, using SiH2Cl2, HCl, GeH4, B2H6, and H2 as reaction gases.