Strained Semiconductor Structure Formation via Low-Temperature HCl Etching
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Solution Overview
Problem
Existing methods for forming strained semiconductor structures face challenges such as surface roughness and defect formation due to oxide residues and high-temperature processing, which affect device performance.
Innovation Solution
The use of a sacrificial layer on top of the strain relaxed buffer layer, which can be etched to expose the underlying buffer layer, allowing for improved oxide removal and regrowth of the strained semiconductor structure without high-temperature baking, using gases like HCl for etching and epitaxial growth to control the environment and prevent oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If high-temperature baking (700-800°C) is used to remove oxides from SiGe surface, then oxide removal is achieved, but surface roughening and Ge-migration occur
Solution Approach 1:
The invention changes the temperature parameter from high (700-800°C) to low temperature processing, and changes the chemical environment from oxidizing to reducing atmosphere using HCl gas, which enables oxide removal without the harmful effects of high-temperature baking
Solution Approach 2:
The invention replaces the thermal field (high-temperature baking) with a chemical field (HCl gas treatment), substituting thermal energy with chemical reaction energy to achieve oxide removal through chemical etching rather than thermal decomposition
2Object-affected harmful factors
If high-temperature baking is used for oxide removal, then oxide removal is achieved, but Ge coalescence and device performance reduction occur
Solution Approach 1:
The invention changes the temperature parameter from high (700-800°C) to low temperature processing, and changes the chemical environment from oxidizing to reducing atmosphere using HCl gas, which enables oxide removal without causing Ge coalescence and maintains device performance
3Object-affected harmful factors
If conventional oxide removal methods are used, then oxide removal is achieved, but complicated pre-cleaning and high temperature baking steps are required
Solution Approach 1:
The invention extracts and eliminates the high-temperature baking step from the conventional multi-step process, achieving oxide removal through a single low-temperature HCl gas treatment step, thereby simplifying the overall fabrication process
Solution Approach 2:
The invention changes the temperature parameter from high to low and introduces HCl gas as the processing medium, transforming a complex multi-step high-temperature process into a simpler low-temperature chemical treatment
4Ease of manufacture
If the SRB layer is exposed without protection, then oxide formation occurs on the SRB layer, but this leads to surface roughness and defects
Solution Approach 1:
The invention creates a reducing atmosphere using HCl gas that prevents oxide formation on the SRB layer while enabling controlled oxide removal from the sacrificial layer, thereby maintaining surface quality without requiring the SRB layer to remain protected
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides well-controlled trench recess formation and improved surface quality, reducing defects and enhancing the performance of strained semiconductor devices by preventing oxide formation and atom migration.
Implementation Method 1
etching through the sacrificial layer such that a portion of the strain relaxed buffer layer is exposed
Implementation Method 2
forming the strained semiconductor structure on the exposed portion of the strain relaxed buffer layer
Data Source
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AI summary
The present invention relates to a method (100) for forming a strained semiconductor structure (212, 312). The method comprises providing (102) a strain relaxed buffer layer (204), forming (104) a sacrificial layer (206, 306) on said strain relaxed buffer layer (204), forming (106) a shallow trench isolation structure (208) through said sacrificial layer (206, 306), removing (108) at least a portion (210) of an oxide layer on said sacrificial layer (206, 306), etching (110) through said sacrificial layer (206, 306) such that a portion of said strain relaxed buffer layer (204) is exposed (110), forming said strained semiconductor structure (212, 312) on said exposed portion (210) of said strain relaxed buffer layer (204).