Strained Semiconductor Active Region Using Buried and Sacrificial Stressors
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Solution Overview
Problem
Strained semiconductor devices face challenges due to high dislocation density in relaxed SiGe layers, leading to undesirable consequences like source/drain junction leakage and reduced channel mobility, as the relaxation mechanism is plastic and results in threading dislocations.
Innovation Solution
A method involving a buried stressor layer and a sacrificial stressor layer is used to strain an active semiconductor layer, where both layers are formed in a stressed state and interact to induce strain in the active layer through edge relaxation, with trenches etched to maintain strain and fill with stiff materials to sustain the transferred stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If a thick layer of SiGe is grown to achieve relaxation and strain the silicon layer, then the strain in the silicon layer is improved, but the dislocation density increases significantly
Solution Approach 1:
The patent divides the single thick SiGe layer into multiple thinner SiGe layers separated by silicon spacer layers. This segmentation allows each SiGe layer to remain below the critical thickness for dislocation formation while collectively providing the necessary strain through elastic edge relaxation at the SiGe/Si interfaces.
Solution Approach 2:
The patent changes the thickness parameter of SiGe layers from a single thick layer to multiple thin layers, and introduces new parameters including silicon spacer layer thickness and composition. This parameter optimization maintains strain while avoiding the plastic relaxation that causes dislocations.
2Stress or pressure
If the SiGe layer thickness exceeds critical thickness to provide sufficient strain, then the strain effect is improved, but plastic deformation occurs causing misfit dislocations
Solution Approach 1:
The patent incorporates silicon spacer layers between SiGe layers to cushion and distribute the lattice mismatch stress. These spacer layers prevent the accumulation of stress that would lead to plastic deformation and dislocation, while still allowing the outer SiGe layers to provide the necessary strain through edge relaxation.
Solution Approach 2:
The patent creates a composite multilayer structure combining SiGe layers with silicon spacer layers. This composite approach allows the system to achieve strain through the combined effect of elastic relaxation at multiple interfaces, avoiding the need for any single layer to exceed its critical thickness.
3Stress or pressure
If threading dislocations are present in the silicon layer, then the strain can be maintained, but device performance deteriorates due to leakage and mobility reduction
Solution Approach 1:
The patent extracts or removes the harmful threading dislocations by avoiding their formation in the first place through the multilayer structure. The silicon spacer layers act as dislocation-blocking interfaces, preventing misfit dislocations from propagating into the active silicon channel region, thereby eliminating the harmful effects on device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a higher level of strain in the active layer compared to using either layer alone, with improved strain distribution and reduced dislocation density, enhancing semiconductor device performance.
Implementation Method 1
both layers are formed in a stressed state and interact to induce strain in the active layer through edge relaxation
Data Source
AI summary
The present invention relates to creating an active layer of strained semiconductor using a combination of buried and sacrificial stressors. That is, a process can strain an active semiconductor layer by transferring strain from a stressor layer buried below the active semiconductor layer and by transferring strain from a sacrificial stressor layer formed above the active semiconductor layer. As an example, the substrate may be silicon, the buried stressor layer may be silicon germanium, the active semiconductor layer may be silicon and the sacrificial stressor layer may be silicon germanium. Elastic edge relaxation is preferably used to efficiently transfer strain to the active layer.