Strained Silicon Carbide Channel for NMOS Electron Mobility

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As CMOS devices scale down, particularly at the 22 nanometer node and beyond, the (110) silicon substrate enhances hole mobility for PMOS transistors but degrades electron mobility for NMOS transistors, making it challenging to maintain balanced mobility performance due to reduced stressor volume and effectiveness of stress liners and embedded stressors.

Innovation Solution

Forming a strained silicon carbide (SiC) portion on the nFET channel region of a (110) silicon substrate by implanting carbon and recrystallizing it, which improves electron mobility without degrading NMOS performance, while maintaining enhanced PMOS performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If stress liners and embedded stressors are used to improve electron mobility, then electron mobility increases, but device scaling to smaller pitches reduces stressor volume and effectiveness

Engineering Contradiction:
Improveelectron mobilityVSAvoidstressor volume
Core Design Contradiction:
SpeedVSVolume of stationary object

Solution Approach 1:

The patent changes the material parameter by introducing silicon carbide (SiC) with different lattice constant and elastic properties compared to silicon. This material parameter change creates intrinsic strain in the nFET channel region that enhances electron mobility without relying on external stressors, thereby overcoming the volume limitation imposed by scaling.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances electron mobility for NMOS transistors without degrading PMOS performance, achieving improved mobility for both types of transistors, particularly at smaller device pitches.

Implementation Method 1

forming the SiC portion by implanting carbon (C) into the nFET channel region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

recrystallization annealing the C-doped Si

Methodology Applied
Scientific EffectRecrystallization: Crystallisation

Implementation Method 3

recrystallization annealing the C-doped Si

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 4

forming the SiC portion by epitaxially growing SiC on the nFET channel region

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8963255B2Strained silicon carbide channel for electron mobility of NMOS
Publication Date: 2015.02.24 GLOBALFOUNDRIES US INC
  • US8963255B2 patent drawing
  • US8963255B2 patent drawing
  • US8963255B2 patent drawing

AI summary

A semiconductor is formed on a (110) silicon (Si) substrate, with improved electron mobility. Embodiments include semiconductor devices having a silicon carbide (SiC) portion in the nFET channel region. An embodiment includes forming an nFET channel region and a pFET channel region in a Si substrate, such as a (110) Si substrate, and forming a silicon carbide (SiC) portion on the nFET channel region. The SiC portion may be formed by ion implantation of C followed by a recrystallization anneal or by epitaxial growth of SiC in a recess formed in the substrate. The use of SiC in the nFET channel region improves electron mobility without introducing topographical differences between NMOS and PMOS transistors.