Strained SiC on SSOI Transistor for Mobility Enhancement
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Solution Overview
Problem
Short channel transistor devices experience reduced saturation current due to velocity saturation, and the use of relaxed silicon carbon degrades mobility, necessitating an improved method for enhancing mobility and saturation velocity while minimizing carbon-related degradation.
Innovation Solution
A strained transistor structure is created by depositing a thin strained SiC layer directly on a strained silicon-on-insulator (SSOI) substrate, leveraging biaxial strain to improve electron mobility and saturation velocity, with the SiC layer containing between 0.1-3.0% carbon to achieve high performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a thin strained SiC layer is deposited directly on an SSOI substrate, then electron mobility and saturation velocity are improved, but device complexity increases due to the specific deposition process requirements
Solution Approach 1:
The SSOI substrate is prepared in advance with pre-existing biaxial strain before the SiC deposition process. This preliminary strain state in the substrate enables the subsequent SiC layer to inherit and amplify the strain, improving electron mobility and saturation velocity without requiring complex in-situ strain application during deposition
Solution Approach 2:
The patent controls the carbon concentration parameter in the SiC layer within a specific range (0.1-3.0% carbon) to optimize the balance between strain amplification benefits and material quality. This parameter control enables improved electron mobility while maintaining acceptable device complexity through standard deposition processes
2Productivity
If SiC is used to enhance saturation velocity, then Idsat enhancement is improved, but mobility degradation occurs due to carbon incorporation
Solution Approach 1:
The patent optimizes the carbon concentration parameter in the SiC layer to fall within 0.1-3.0%, which is sufficient to provide strain amplification for saturation velocity enhancement while remaining low enough to avoid severe mobility degradation from carbon incorporation. This precise parameter control resolves the contradiction between Idsat enhancement and mobility maintenance
Solution Approach 2:
The device structure combines strained silicon-on-insulator (SSOI) substrate with a thin strained SiC layer to create a composite structure. The SiC layer provides strain amplification for velocity saturation improvement, while the underlying SSOI substrate maintains good crystal quality and electron mobility, achieving both Idsat enhancement and mobility preservation through material composition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances saturation current by improving electron mobility and saturation velocity, leading to more effective Idsat enhancement while maintaining device stability and reducing defects.
Implementation Method 1
The strained transistor structure is created by depositing a thin strained SiC layer directly on a strained silicon-on-insulator (SSOI) substrate, leveraging biaxial strain to improve electron mobility and saturation velocity
Implementation Method 2
The method of making the device structure includes deposition of a thin SiC layer directly onto strained Si of an SSOI substrate with a thick patterned oxide
Data Source
AI summary
A semiconductor device (10) comprising a substrate (12) and an oxide layer (14) formed over the substrate is provided. The semiconductor device further includes a first semiconductor layer (16) having a first lattice constant formed directly over the oxide layer. The semiconductor device further includes a second semiconductor layer (26) having a second lattice constant formed directly over the first semiconductor layer, wherein the second lattice constant is different from the first lattice constant.


