Strained Source/Drain Epitaxial Growth for Carrier Mobility
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Solution Overview
Problem
Existing methods for forming strained source and drain features in semiconductor devices, such as MOSFETs, are not entirely satisfactory in enhancing carrier mobility and device performance, particularly due to limitations in precision and strain distribution.
Innovation Solution
A method involving epitaxial growth of SiGe and Si layers in trenches with specific etching and deposition processes to form strained source and drain features, which includes forming a buffer layer and a main strain layer to enhance carrier mobility and improve device performance without ion implantation, allowing for precise control of junction depth and sidewall abruptness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing epitaxial methods are used to form strained source/drain features, then carrier mobility enhancement is achieved, but manufacturing precision and strain distribution control are insufficient
Solution Approach 1:
The source/drain structure is segmented into three distinct regions: a first strained source/drain region with first epitaxial material, a second strained source/drain region with second epitaxial material, and a third unstrained source/drain region. This segmentation allows different strain characteristics to be precisely controlled in different regions, improving both carrier mobility enhancement and strain distribution control simultaneously.
Solution Approach 2:
Different epitaxial materials are selectively applied to different regions of the source/drain structure. The first and second strained regions receive materials with specific compositional ranges optimized for their respective locations, while the third region receives a different material composition. This local quality approach enables precise control of strain distribution while maintaining high carrier mobility in each region.
2Reliability
If ion implantation is used to form source/drain features, then doping is achieved, but strain relaxation and current leakage increase
Solution Approach 1:
The mechanical ion implantation process is replaced with an epitaxial growth process. Instead of physically implanting ions into the semiconductor lattice, the desired dopants are incorporated during the epitaxial growth of the source/drain regions. This substitution eliminates the mechanical damage and strain relaxation associated with ion implantation while maintaining effective doping, thereby reducing current leakage and improving device performance.
3Ease of manufacture
If conventional epitaxial growth is used, then source/drain features are formed, but control over junction depth and sidewall abruptness is limited
Solution Approach 1:
Gate spacers are formed prior to the epitaxial growth of the source/drain regions. These pre-formed spacers serve as precise masks that define the boundaries of the source/drain regions. During subsequent epitaxial growth, the spacers protect adjacent regions, ensuring precise junction depth control and abrupt sidewalls. This preliminary action of forming spacers before epitaxy enables manufacturing precision that cannot be achieved with conventional simultaneous formation methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility, improves device performance by reducing strain relaxation and current leakage, and provides precise control over short channel effects and contact resistance, leading to increased saturation current and improved device efficiency.
Implementation Method 1
epitaxial growth of SiGe and Si layers in trenches with specific etching and deposition processes to form strained source and drain features
Implementation Method 2
strained source/drain features (e.g., stressor regions) have been implemented using epitaxial (epi) semiconductor materials to enhance carrier mobility and improve device performance
Data Source
AI summary
An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides a processing for forming improved lightly doped source/drain features and source/drain features in the semiconductor device. Semiconductor device with the improved lightly doped source/drain features and source/drain features may prevent or reduce defects and achieve high strain effect. In at least one embodiment, the lightly doped source/drain features and source/drain features comprises the same semiconductor material formed by epitaxial growth.


