Semiconductor Channel Structure With Strained Source/Drain Epitaxy

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Solution Overview

Problem

As semiconductor devices continue to shrink in size, the complexity of fabrication processes increases, making it challenging to form reliable semiconductor devices at smaller scales.

Innovation Solution

The method involves forming an epitaxial seed layer over an isolation layer in source/drain openings, followed by the growth of source/drain epitaxial structures with a higher germanium concentration, inducing strain due to lattice mismatch, and forming a gate structure around the semiconductor channel layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency is improved and costs are lowered, but fabrication process complexity increases and reliability deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidfabrication process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The fabrication process is divided into multiple distinct stages: forming isolation layers in source/drain regions, selective epitaxial growth of semiconductor layers, pattern transfer, and gate formation. Each stage addresses specific requirements independently, making the overall complex process more manageable and reliable despite continued scaling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device are given different properties: isolation layers are formed specifically in source/drain regions rather than uniformly across the substrate, and epitaxial growth is performed selectively in certain areas. This localized approach allows optimization for each region's specific functional requirements while maintaining overall device performance.

Inventive Principle:
Principle #3Local quality

2Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency is improved and costs are lowered, but fabrication reliability deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidfabrication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Isolation layers are formed in the source/drain regions before the main epitaxial growth and device fabrication steps. This preliminary action prepares the structure in advance, preventing potential reliability issues that would arise from forming these features later at smaller dimensions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The isolation layers act as intermediary structures between the substrate and the active device regions. These layers mediate the interface properties, providing a controlled transition zone that enhances fabrication reliability by managing stress, contamination, and electrical properties at critical interfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If source/drain epitaxial structures with higher germanium concentration are formed, then current flow is enhanced, but lattice mismatch strain increases

Engineering Contradiction:
Improvedevice performanceVSAvoidlattice mismatch strain
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The germanium concentration in the epitaxial structures is varied to optimize device performance. By controlling the composition parameter, the material achieves higher carrier mobility and improved current flow while the resulting lattice mismatch strain is managed through the previously formed isolation layers and careful structural design.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves device performance by reducing leakage current and parasitic capacitance, while also enhancing current flow through the semiconductor channel layers.

Implementation Method 1

growth of source/drain epitaxial structures with a higher germanium concentration, inducing strain due to lattice mismatch

Methodology Applied
Scientific EffectLattice mismatch:

Data Source

PatentUS20250056840A1Semiconductor device and method for forming the same
Publication Date: 2025.02.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250056840A1 patent drawing
  • US20250056840A1 patent drawing
  • US20250056840A1 patent drawing

AI summary

A semiconductor device includes a substrate. Semiconductor channel layers are over the substrate. A gate structure wraps around each of the semiconductor channel layers. Source/drain epitaxial structures are on opposite sides of the gate structure. Epitaxial seed layers are below the source/drain epitaxial structures, respectively, in which a lattice constant of the epitaxial seed layers is different from a lattice constant of the source/drain epitaxial structures. Isolation layers are over the substrate and vertically below the epitaxial seed layers, respectively.