Strained Semiconductor Substrate Support for Deep Trench Isolation
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Solution Overview
Problem
Existing methods for producing semiconductor substrates with strained semiconductor regions face excessive relaxation of the strained semiconductor during etching, which reduces the beneficial strain effects in transistors, especially when isolation trenches need to reach significant depths.
Innovation Solution
A method involving the creation of a mechanical support element by modifying the strained semiconductor portions at the etching edges, which are in contact with the buried dielectric layer, to prevent excessive relaxation during etching, allowing for deeper trench formation without strain loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching is performed to create isolation trenches in strained semiconductor regions, then trench formation is achieved, but excessive relaxation of the strained semiconductor occurs, reducing the beneficial strain effects
Solution Approach 1:
A mechanical support element is formed at the interface between the strained semiconductor and the buried dielectric layer before the etching process. This preliminary structural preparation prevents excessive relaxation during subsequent trench formation, maintaining the strain in the semiconductor channel region while enabling deep isolation trench creation.
Solution Approach 2:
The mechanical support element acts as an intermediary structure between the strained semiconductor and the buried dielectric layer. It provides mechanical reinforcement to the interface region, preventing the semiconductor from relaxing during etching while allowing the etching process to proceed and form deep isolation trenches.
2Reliability
If deeper isolation trenches are formed, then isolation effectiveness is improved, but strain relaxation in the semiconductor increases
Solution Approach 1:
The mechanical support element is formed in advance at the semiconductor-dielectric interface before deep trench etching. This preliminary reinforcement enables the subsequent formation of deeper isolation trenches that reach significant depths while preventing the strain in the semiconductor channel from relaxing excessively during the aggressive etching process.
Solution Approach 2:
The mechanical support element provides beforehand cushioning or reinforcement to the interface region between the strained semiconductor and the buried dielectric layer. This pre-prepared support structure absorbs or resists the mechanical stresses generated during deep trench formation, preventing strain relaxation while enabling effective deep isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively maintains the strain in semiconductor regions, enabling the production of FETs with strained channels, including compressively strained SiGe and tensile strained Si or SiGe, suitable for various transistor types like FDSOI, FinFET, and nanowire/nanosheet FETs, while avoiding the need for complex alignment of etching masks.
Implementation Method 1
The strained semiconductor portions at the etching edges, which are in contact with the buried dielectric layer, are modified to form a mechanical support element preventing excessive relaxation
Data Source
AI summary
A method for producing a semiconductor substrate is provided, including: producing a superficial layer arranged on a buried dielectric layer and including a strained semiconductor region; producing an etching mask on the superficial layer, covering a part of the region; etching the superficial layer to a pattern of the mask, exposing a first lateral edge of a first strained semiconductor portion belonging to the part and contacting the dielectric layer; forming a mechanical barrier from a second portion of material belonging to the first portion, the second portion having a bottom surface contacting the dielectric layer and an upper surface contacting the mask, the barrier arranged against the part and bearing mechanically against the second portion, and removing the mask.


