Strained Transistor Channel via Sacrificial Source-Drain Segmentation
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Solution Overview
Problem
Existing methods for enhancing transistor channel stress, such as using silicon-germanium or carbon-doped silicon regions, face challenges like difficulty in optimizing electrical conductivity and thermal stability, especially with high germanium or carbon content, which affects stress induction and doping efficiency.
Innovation Solution
A method involving sacrificial source and drain regions optimized for stress induction, followed by replacing them with regions having improved electrical and thermal properties, allowing for stress memorization and adjustment, is implemented. This includes forming sacrificial regions to induce stress, fixing it with a gate stack, and then replacing them with regions optimized for electrical characteristics and ease of doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If silicon-germanium regions with higher germanium content are used to increase compressive stress in the channel, then stress induction is improved, but difficulty in doping and optimizing electrical conductivity increases
Solution Approach 1:
The source/drain structure is divided into two distinct parts: sacrificial source/drain regions made of silicon-germanium with high germanium content for stress induction, and replacement source/drain regions made of silicon with optimized doping for electrical conductivity. This segmentation allows each part to be optimized for its specific function without compromise.
Solution Approach 2:
The sacrificial source/drain regions act as intermediary structures that temporarily provide the necessary compressive stress to the channel during manufacturing. These intermediary structures are later replaced by the final source/drain regions that maintain stress while providing optimal electrical properties.
2Stress or pressure
If carbon-doped silicon regions with higher carbon content are used to increase tensile stress in the channel, then stress induction is improved, but thermal stability deteriorates
Solution Approach 1:
The source/drain structure is segmented into sacrificial regions made of carbon-doped silicon with high carbon content for stress induction, and replacement regions made of undoped or lightly-doped silicon for thermal stability. This allows the stress function and stability function to be separated into different materials.
Solution Approach 2:
The sacrificial carbon-doped silicon source/drain regions are treated as temporary, disposable structures used only during the stress induction phase of manufacturing. After serving their purpose, they are removed and replaced by stable silicon regions that do not require the problematic high-carbon material.
3Stress or pressure
If carbon-doped silicon regions with higher carbon content are used to increase tensile stress, then stress induction is improved, but doping efficiency deteriorates
Solution Approach 1:
The source/drain structure is divided into sacrificial carbon-doped silicon regions for stress induction and replacement silicon regions for efficient doping. This segmentation allows the replacement regions to be doped with standard efficiency while the sacrificial regions provide the necessary stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables effective stress induction in transistor channels while maintaining optimal electrical properties and thermal stability, allowing for improved conductivity and reduced leakage current, even with high germanium or carbon content.
Implementation Method 1
forming sacrificial regions on either side of the semiconductor zone, the sacrificial regions being based on a second semiconductor material and being configured so as to induce a stress in the semiconductor zone
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 1E~1F
AI summary
A method for manufacturing at least one strained transistor channel semiconductor structure, comprising the steps of forming, on a semiconductor area intended to form a channel region of a transistor, a sacrificial gate block and insulating spacers (17a) arranged against lateral faces of the sacrificial gate block; forming sacrificial regions (20) against lateral faces of said semiconductor area, said sacrificial regions (20) being configured to apply a strain on said semiconductor area; removing said sacrificial gate block between said insulating spacers (17a); replacing said sacrificial gate block with a replacement gate block between said insulating spacers (17a); removing said sacrificial regions (20); and replacing said sacrificial regions (20) with replacement regions against lateral faces of said semiconductor area.