Poly-Stranded FEC Encoding for Low-Error Optical Transmission

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Solution Overview

Problem

Conventional forward error correction techniques in optical communication systems, such as product codes and braided codes, exhibit inferior error rates and are not amenable to efficient parallel implementation, which is crucial for high-speed communication systems.

Innovation Solution

The development of poly-stranded error correcting codes, which organize data bits into multiple strands and use base error correcting codes to generate parity bits, allowing for parallel encoding and decoding, thereby achieving lower error rates and efficient implementation in high-speed optical communication systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional forward error correction techniques (product codes, braided codes) are used, then error correction capability is provided, but error rates remain inferior and parallel implementation efficiency is poor

Engineering Contradiction:
Improveerror rateVSAvoidparallel implementation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments data bits into multiple independent strands, where each strand is encoded separately using base error correcting codes. This segmentation enables parallel processing of multiple strands simultaneously, improving implementation efficiency while maintaining strong error correction capability through the collective redundancy across all strands

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a composite error correction structure by combining multiple base error correcting codes into a poly-stranded code. This composite approach integrates the strengths of individual base codes to achieve superior overall error correction performance and enables efficient parallel implementation through the modular nature of the composite structure

Inventive Principle:
Principle #40Composite materials

2Speed

If higher data transmission rates are achieved, then communication speed increases, but error rates tend to increase due to noise and interference

Engineering Contradiction:
Improvedata transmission rateVSAvoidbit error rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies error correction encoding in advance before data transmission, organizing data bits into strands and generating parity bits through base error correcting codes. This preliminary error correction preparation enables the system to withstand higher transmission rates by pre-establishing redundancy that can correct errors introduced during high-speed transmission

Inventive Principle:
Principle #10Preliminary action

3Reliability

If more redundancy is added to data bits, then error correction capability improves, but data transmission efficiency decreases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent optimizes the redundancy parameter by using base error correcting codes that generate parity bits at an optimized rate. The poly-stranded structure allows adjustment of strand count and base code selection to achieve the optimal balance between redundancy (error correction capability) and data transmission efficiency, avoiding excessive redundancy while maintaining strong error correction

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11483879B2Forward error correction systems and methods
Publication Date: 2022.10.25 ACACIA TECH INC
  • US11483879B2 patent drawing
  • US11483879B2 patent drawing
  • US11483879B2 patent drawing

AI summary

Techniques for performing forward error correction of data to be transmitted over an optical communications channel. The techniques include: receiving data bits; organizing the data bits into an arrangement having a plurality of blocks organized into rows and columns and into a plurality of strands including a first strand of blocks that includes a back portion comprising a first row of the plurality of blocks, and a front portion comprising blocks from at least two different columns in at least two different rows other than the first row of blocks; and encoding at least some of the data bits in the arrangement using a first error correcting code at least in part by generating first parity bits by applying the first error correcting code to first data bits in the front portion of the first strands and second data bits in the back portion of the first strand.