Strap Cell Counter-Doped Regions Suppress Voltage Drop

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Solution Overview

Problem

In semiconductor devices like SRAM, insufficient density of strap cells in the column direction can lead to latch-up and performance degradation due to varying distances of bitcells from the closest strap cells, causing voltage drop and malfunction.

Innovation Solution

The implementation of semiconductor fins and strategically placed strap cells with N-type and P-type well pickup regions, including counter-doped areas, to provide efficient well bias and prevent voltage drop along the column direction, allowing for reduced well contact and sheet resistance, thereby enhancing the performance and reducing the number of strap cells required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the density of strap cells in the column direction is increased, then voltage drop and latch-up are suppressed, but the total area occupied by strap cells increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidstrap cell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by creating counter-doped regions with opposite conductivity type adjacent to the well pickup regions. These counter-doped regions have different electrical properties (opposite conductivity) that actively counteract voltage drop, allowing each strap cell to effectively serve more bitcells without increasing the number of strap cells needed.

Inventive Principle:
Principle #3Local quality

2Productivity

If the number of strap cells is reduced, then the area for bitcells increases, but voltage drop and latch-up may occur due to varying distances from strap cells

Engineering Contradiction:
Improvestorage capacityVSAvoidvoltage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the electrical parameters of the strap cell by introducing counter-doped regions with opposite conductivity type. This parameter change (adding opposite conductivity regions) enhances the voltage regulation capability of each strap cell, allowing fewer strap cells to cover the same area while maintaining voltage stability and preventing latch-up.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If well contact resistance and sheet resistance are reduced, then voltage drop is minimized, but the complexity of the strap cell structure increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidstrap cell structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the well pickup function with voltage regulation by integrating counter-doped regions directly adjacent to the well pickup regions within the same strap cell structure. This combining of functions achieves reduced voltage drop through enhanced electrical properties without requiring separate structures, thus managing complexity while improving performance.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10868019B2Semiconductor device having strap cell
Publication Date: 2020.12.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10868019B2 patent drawing
  • US10868019B2 patent drawing
  • US10868019B2 patent drawing

AI summary

A semiconductor device includes: a first well having a first conductivity-type extending along a first direction; second and third wells having a second conductivity-type and disposed on opposite sides of the first well in a second direction; a first array of bitcells and a second array of bitcells disposed on the first to third wells; a strap cell disposed on the first to third wells and between the first and second arrays and including first and second well pickup regions having the first conductivity-type, disposed on the first well, and spaced-apart from each other in the first direction, and third and fourth well pickup regions having the second conductivity-type and disposed on the second and third wells, respectively; first and second conductive patterns electrically connected to the first and second well pickup regions, respectively; and a third conductive pattern electrically connected to the third and fourth well pickup regions.