Strap Cells as Source Line Pull Down Circuits

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Solution Overview

Problem

Existing flash memory systems require significant die space and complexity for source line pull down circuits, which increases manufacturing cost and complexity, and previous solutions like using dummy memory cells also incur additional die space and cost.

Innovation Solution

The use of existing strap cells in the array as pull down circuits for source lines, where strap cells are selectively coupled to ground during read or erase modes and to a voltage source during programming, reducing the need for additional die space and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional source line pull down circuits are used, then source line voltage control is achieved, but die space and circuit complexity increase significantly

Engineering Contradiction:
Improvesource line voltage controlVSAvoiddie space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The strap cells, originally designed for voltage reference and programming purposes, are made to serve dual functions by enabling source line pull down capability. This multi-functionality eliminates the need for separate pull down circuits, thereby reducing die space while maintaining reliable voltage control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory array's existing strap cells are utilized to provide the pull down function that would otherwise require dedicated external circuits. The strap cells serve themselves and the source line simultaneously, reducing overall circuit complexity and die space requirements.

Inventive Principle:
Principle #25Self-service

2Reliability

If dummy memory cells are used as pull down circuits, then source line pull down function is achieved, but additional die space and manufacturing cost are incurred

Engineering Contradiction:
Improvesource line pull down functionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Instead of adding dummy memory cells that serve only as pull down circuits, the invention makes the existing strap cells perform both their original function and the pull down function. This self-service approach eliminates additional manufacturing steps and reduces production costs.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention recovers the unused pull down capability inherent in the strap cell structure. Rather than discarding the strap cells' full potential and adding separate dummy cells, the solution activates their latent functionality to provide source line pull down, thereby avoiding additional manufacturing costs.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If more pull down circuits are added, then source line voltage control is improved, but electromagnetic interference and power dissipation increase

Engineering Contradiction:
Improvesource line voltage controlVSAvoidelectromagnetic interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By making strap cells multi-functional, the invention achieves source line voltage control without adding separate pull down circuits. This avoids the electromagnetic interference that would result from multiple active circuits operating simultaneously, while still providing reliable voltage control through the strap cells' inherent structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4136639B1Non-volatile memory system using strap cells in source line pull down circuits
Publication Date: 2024.07.24 SILICON STORAGE TECHNOLOGY INC
  • EP4136639B1 patent drawingFigure 1
  • EP4136639B1 patent drawingFigure 2
  • EP4136639B1 patent drawingFigure 3

AI summary

The present invention relates to a flash memory device that uses strap cells in a memory array of non-volatile memory cells as source line pull down circuits. In one embodiment, the strap cells are erase gate strap cells. In another embodiment, the strap cells are source line strap cells. In another embodiment, the strap cells are control gate strap cells. In another embodiment, the strap cells are word line strap cells.