Streaming Engine Dual Cache Ports Arbitration

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Solution Overview

Problem

Modern digital signal processors face challenges with increasing workloads, memory bandwidth, and latency issues, particularly in real-time data processing, where memory access patterns are unpredictable and difficult to manage within existing address generation and memory access resources.

Innovation Solution

A streaming engine is employed in digital signal processors that manages two fixed data streams with address generators and steam head registers, sharing memory ports and using arbiters to ensure fair allocation and bandwidth distribution, allowing one stream to borrow from the other's interface when idle, thus preventing bottlenecks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If two data streams share two memory ports with fair allocation, then memory bandwidth utilization is improved, but device complexity increases due to arbiters and interface sharing mechanisms

Engineering Contradiction:
Improvememory bandwidth utilizationVSAvoidarbiters and interface sharing mechanisms
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the memory interface resources by allowing two data streams to share two memory ports through arbiters. The arbiters manage resource allocation dynamically, enabling one stream to borrow from the other's interface when idle, thus improving overall memory bandwidth utilization without requiring dedicated interfaces for each stream.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The arbitration mechanism implements dynamic resource allocation where the allocation of memory ports to data streams is not fixed but changes based on real-time availability and demand. The arbiters continuously adjust which stream accesses which port, allowing flexible borrowing of idle interfaces and preventing bottlenecks through adaptive scheduling.

Inventive Principle:
Principle #15Dynamics

2Productivity

If one stream borrows from the other's idle interface, then bandwidth demand is spread across both interfaces preventing bottlenecks, but loss of time occurs due to arbitration overhead and interface switching

Engineering Contradiction:
Improvebandwidth distribution efficiencyVSAvoidarbitration overhead and interface switching
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The arbitration mechanism ensures continuous useful action by allowing data streams to immediately borrow idle memory interfaces without waiting for dedicated port availability. This eliminates idle time in the memory subsystem by keeping both interfaces continuously utilized, with arbiters rapidly switching allocation to maintain uninterrupted data flow.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The arbiters serve as intermediaries that manage the borrowing and returning of memory interfaces between data streams. They mediate the resource sharing by monitoring interface availability and coordinating access, minimizing conflicts and overhead through centralized control of the shared resources.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If memory access resources are increased to handle unpredictable patterns, then memory latency is reduced, but device complexity and cost increase

Engineering Contradiction:
Improvememory latency performanceVSAvoidaddress generation and memory access resources
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory interface is designed with universal functionality to serve multiple data streams through shared access. The arbiters enable a single memory port to be dynamically allocated to different streams based on demand, making the memory access resources multi-functional rather than dedicated to specific streams, thus reducing the total number of resources needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes the operational parameters of memory access by implementing dynamic arbitration and interface sharing. Instead of static allocation, the arbitration mechanism adjusts access patterns, timing, and resource assignment in real-time, optimizing memory latency performance through parameter adaptation rather than through increasing hardware resources.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240403055A1Dual data streams sharing dual cache access ports
Publication Date: 2024.12.05 TEXAS INSTRUMENTS INC
  • US20240403055A1 patent drawing
  • US20240403055A1 patent drawing
  • US20240403055A1 patent drawing

AI summary

A streaming engine employed in a digital data processor specifies fixed first and second read only data streams. Corresponding stream address generator produces address of data elements of the two streams. Corresponding steam head registers stores data elements next to be supplied to functional units for use as operands. The two streams share two memory ports. A toggling preference of stream to port ensures fair allocation. The arbiters permit one stream to borrow the other's interface when the other interface is idle. Thus one stream may issue two memory requests, one from each memory port, if the other stream is idle. This spreads the bandwidth demand for each stream across both interfaces, ensuring neither interface becomes a bottleneck.