Streaming Interconnect Architecture for Data Processing Engine Arrays

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Solution Overview

Problem

Existing data processing engine arrays face inefficiencies in data transfer between engines, particularly when direct communication links are unavailable, leading to increased latency and resource utilization due to reliance on interconnects for non-neighboring engine communication.

Innovation Solution

The implementation of a method where data processing engines in an array use reserved point-to-point communication paths through streaming interconnects to transfer data between neighboring and non-neighboring engines, utilizing circuit switching for deterministic routing and packet switching for flexible data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is transmitted through the interconnect for non-neighboring engine communication, then data transfer between any two engines is enabled, but latency increases and bandwidth is reduced

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The communication paths are segmented into two types: direct communication links for neighboring engines and interconnect paths for non-neighboring engines. This segmentation allows the system to use the faster direct links when possible, reducing latency for common communication patterns while maintaining full connectivity through the interconnect when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Direct communication links are established preliminarily between neighboring engines before data transfer operations begin. By pre-configuring these direct paths, the system eliminates the need for runtime routing decisions and reduces latency for engines that frequently communicate with their neighbors.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is transmitted through the interconnect for non-neighboring engine communication, then full connectivity is achieved, but resource utilization increases

Engineering Contradiction:
ImproveconnectivityVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different communication quality is provided based on engine proximity: neighboring engines receive high-quality direct communication links with lower resource utilization, while non-neighboring engines use the interconnect with higher resource utilization. This local quality differentiation optimizes overall system efficiency by matching communication resources to actual needs.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10990552B1Streaming interconnect architecture for data processing engine array
Publication Date: 2021.04.27 XILINX INC
  • US10990552B1 patent drawing
  • US10990552B1 patent drawing
  • US10990552B1 patent drawing

AI summary

Examples herein describe techniques for communicating between data processing engines in an array of data processing engines. In one embodiment, the array is a 2D array where each of the DPEs includes one or more cores. In addition to the cores, the data processing engines can include a memory module (with memory banks for storing data) and an interconnect which provides connectivity between the engines. To transmit processed data, a data processing engine identifies a destination processing engine in the array. Once identified, the data processing engine can transmit the processed data using a reserved point-to-point communication path in the interconnect that couples the source and destination data processing engines.