Stress Cap Layer Spacer Removal for MOSFET Channel Stress Transfer
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Solution Overview
Problem
As semiconductor processes advance to the deep sub-micron level, there is a critical need to increase the driving current for MOS transistors, and existing methods for enhancing electron mobility through strained silicon layers are limited in effectively transferring stress to the channel region.
Innovation Solution
A semiconductor structure and method involving a substrate with a dielectric layer, a gate conductive layer, spacers, and a stress cap layer, where the spacers are partially removed to allow the stress cap layer to be closer to the channel region, increasing the coverage area and stress transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a stress cap layer is formed to cover the gate structure, then the stress coverage area is increased, but the stress transfer efficiency to the channel region is reduced due to the spacer distance
Solution Approach 1:
The patent extracts (partially removes) the spacer material to reduce the distance between the stress cap layer and the channel region. This selective removal allows the stress cap layer to extend closer to the channel, improving stress transfer efficiency while maintaining adequate coverage area.
Solution Approach 2:
The patent applies local quality by creating a non-uniform spacer structure where parts of the spacer are removed in specific locations. This allows different regions to have different properties: the spacer is present in some areas to maintain structural integrity and coverage, while removed in other areas to enable direct stress transfer to the channel region.
2Reliability
If the spacer is partially removed to bring the stress cap layer closer to the channel region, then the stress transfer efficiency is improved, but the structural integrity of the gate structure may be compromised
Solution Approach 1:
The spacer is selectively removed only in the regions where stress transfer is needed, while maintaining the spacer structure in other critical areas. This localized modification approach preserves the overall structural integrity of the gate while enabling effective stress transfer to the channel region.
Solution Approach 2:
Instead of completely removing the spacer, the patent applies partial action by removing only the necessary portions. This partial removal is sufficient to achieve the stress transfer goal while leaving enough spacer material to maintain structural support and electrical isolation where needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively enhances the stress transfer to the channel region, improving the mobility of electrons and holes, thereby increasing the performance of MOS transistors.
Implementation Method 1
The stress cap layer not only covers the gate structure, and also covers parts of the sidewalls of the gate structure, so that the coverage area is larger, and it is more effective to transfer the stress of the stress cap layer to the channel region
Data Source
AI summary
The present invention provides a method for fabricating a semiconductor structure, the method at least comprises: firstly, a substrate is provided, a dielectric layer is formed on the substrate, a gate conductive layer and two spacers are formed and disposed in the dielectric layer, wherein the two spacers are respectively disposed on both sides of the gate conductive layer, next, parts of the gate conductive layer are removed, and parts of the two spacers are removed, wherein a top surface of the two spacers is lower than a top surface of the gate conductive layer, and afterwards, a stress cap layer is then formed, overlying the gate conductive layer and the two spacers, wherein parts of the stress cap layer is located right above the two spacers.