Stress-Compensating Wafer Bonding for Semiconductor Warpage Control
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Solution Overview
Problem
Semiconductor light-emitting devices, such as III-nitride LEDs, face warping issues due to thermal expansion mismatches when bonded to support substrates, making them unprocessable by standard wafer fabrication equipment.
Innovation Solution
A wafer-scale bonding method is employed, where a semiconductor device wafer is bonded to a support substrate and a stress-compensating wafer, with the latter balancing the stress introduced during cooldown, thereby minimizing warpage and allowing for further processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semiconductor device wafer is bonded to a support substrate, then electrical and mechanical connection is achieved, but warpage occurs due to thermal expansion mismatch
Solution Approach 1:
The patent introduces a stress-compensating wafer with specific material properties (different coefficient of thermal expansion) to counterbalance the thermal stress generated during bonding. By carefully selecting the stress-compensating wafer's material parameters, the overall stress state of the bonded structure is adjusted to maintain flatness while preserving bonding reliability.
Solution Approach 2:
The stress-compensating wafer acts as a counterweight to the thermal expansion forces. The stress-compensating wafer is bonded to the opposite side of the support substrate, creating a balanced structure where the stress from the support substrate is counteracted by an equal and opposite stress from the stress-compensating wafer, thereby preventing warpage.
2Shape
If a stress-compensating wafer is added to balance stress, then warpage is reduced, but device structure complexity increases
Solution Approach 1:
The bonding structure is segmented into functionally distinct components: the support substrate providing mechanical support, the stress-compensating wafer providing stress balance, and the semiconductor device wafer carrying the active devices. This segmentation allows each component to be optimized independently for its specific function while working together as an integrated system.
Solution Approach 2:
The patent employs a composite structure consisting of multiple materials with different properties (support substrate material, stress-compensating wafer material, and semiconductor device material). This composite approach allows the system to leverage the advantageous properties of each material to achieve both stress compensation and functional performance.
3Productivity
If wafer-scale bonding is used instead of individual die bonding, then productivity increases, but stress control becomes more difficult
Solution Approach 1:
The stress-compensating wafer serves multiple functions simultaneously: it provides stress compensation across the entire wafer surface, maintains flatness for subsequent processing, and enables wafer-scale bonding by distributing stresses uniformly. This multi-functionality allows wafer-scale processing to proceed without compromising stress control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces warpage and enables wafer-scale processing of semiconductor devices, improving their manufacturability and reducing production costs by allowing for simultaneous bonding and stress compensation.
Implementation Method 1
the first and second wafer each have a different coefficient of thermal expansion than the growth substrate
Data Source
AI summary
A method according to embodiments of the invention includes providing a wafer of semiconductor devices grown on a growth substrate. The wafer of semiconductor devices has a first surface and a second surface opposite the first surface. The second surface is a surface of the growth substrate. The method further includes bonding the first surface to a first wafer and bonding the second surface to a second wafer. In some embodiments, the first and second wafer each have a different coefficient of thermal expansion than the growth substrate. In some embodiments, the second wafer may compensate for stress introduced to the wafer of semiconductor devices by the first wafer.