Stress Compensation Region for Semiconductor Package Substrates

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Solution Overview

Problem

The thermal mismatch between semiconductor chips and package substrates leads to mechanical stress, reduced reliability, and production yield in integrated circuits due to the use of low-k dielectric materials with reduced mechanical stability and adhesion, exacerbated by flip chip packaging and lead-free materials.

Innovation Solution

A stress compensation region with a different coefficient of thermal expansion is introduced on the package substrate to reduce thermally induced deformation, providing superior mechanical characteristics and reducing chip-package interactions during assembly and operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If low-k dielectric materials are used to reduce signal propagation delay, then electrical performance is improved, but mechanical stability and adhesion are reduced

Engineering Contradiction:
Improvesignal propagation speedVSAvoidmechanical stability of dielectric
Core Design Contradiction:
SpeedVSStrength

Solution Approach 1:

The patent introduces a stress compensation region with specific material properties (different coefficient of thermal expansion) located adjacent to the chip but not underneath it. This localized structural modification provides mechanical support precisely where needed - in the areas surrounding the chip where thermally induced stress concentrates - while preserving the electrical performance benefits of low-k dielectrics in the metallization layers.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The stress compensation region is formed on the package substrate before the chip is attached. This preliminary structural preparation ensures that the mechanical support is already in place to counteract thermal expansion stresses that will occur during subsequent heating processes, preventing delamination before it can occur.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If flip chip packaging with lead-free materials is used to increase connection density, then electrical connectivity is improved, but thermally induced stress is increased

Engineering Contradiction:
Improveconnection densityVSAvoidthermally induced stress
Core Design Contradiction:
ProductivityVSStress or pressure

Solution Approach 1:

The stress compensation region acts as an intermediary structural element between the chip and the surrounding package substrate. It mediates the thermal expansion mismatch by providing a transition zone with intermediate mechanical properties, reducing the direct stress transmission to the chip and low-k dielectric layers while still allowing the flip chip connection density benefits to be realized.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If substrate area is increased to improve production yield, then manufacturing efficiency is improved, but chip-package thermal mismatch is exacerbated

Engineering Contradiction:
Improveproduction yieldVSAvoidchip-package thermal mismatch stress
Core Design Contradiction:
ProductivityVSStress or pressure

Solution Approach 1:

The patent effectively segments the package substrate into different functional regions: a chip receiving portion where the chip is mounted, and surrounding stress compensation regions with different material properties. This segmentation allows the overall substrate area to be large for high production yield, while the localized stress compensation regions manage the thermal mismatch stresses that increase with larger area.

Inventive Principle:
Principle #1Segmentation

4Area of stationary object

If feature sizes are scaled down to maximize substrate utilization, then area efficiency is improved, but mechanical stability of metallization system is reduced

Engineering Contradiction:
Improvesubstrate area utilizationVSAvoidmechanical stability of metallization
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The stress compensation region provides localized mechanical support in the areas surrounding the chip, creating a gradient of mechanical properties across the package substrate. This allows the metallization features to be scaled down for high area efficiency while the stress compensation region provides the necessary mechanical stability where thermal stresses concentrate, preventing delamination of the scaled-down features.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and production yield of semiconductor devices by minimizing mechanical stress and delamination in metallization systems, allowing for increased complexity and functionality without compromising mechanical stability.

Implementation Method 1

the stress compensation region has a different coefficient of thermal expansion compared to the package substrate

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8497583B2Stress reduction in chip packaging by a stress compensation region formed around the chip
Publication Date: 2013.07.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8497583B2 patent drawing
  • US8497583B2 patent drawing
  • US8497583B2 patent drawing

AI summary

A stress compensation region that may be appropriately positioned on a package substrate may compensate for or at least significantly reduce the thermally induced mechanical stress in a sensitive metallization system of a semiconductor die, in particular during the critical reflow process. For example, a stressor ring may be formed so as to laterally surround the chip receiving portion of the package substrate, wherein the stressor ring may efficiently compensate for the thermally induced deformation in the chip receiving portion.