Stress-Equalizing Dummy Chip for Semiconductor Package
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Solution Overview
Problem
Multi-chip semiconductor packages experience variations in electrical characteristics due to stress singularities, leading to changes in circuit electrical characteristics, which complicates the design and operation of correction circuits.
Innovation Solution
A semiconductor package is designed with a stress-equalizing chip stacked on top of other semiconductor chips, which is not electrically connected to the substrate or other chips, and covered by an encapsulant, to reduce stress variations and stabilize electrical characteristics across the chip stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple semiconductor chips are stacked vertically to reduce package size, then the package size is reduced, but stress variation among chips increases causing electrical characteristic distribution to worsen
Solution Approach 1:
A stress-equalizing chip is introduced as an intermediary component between the substrate and the functional semiconductor chips. This dummy chip absorbs excess stress and equalizes the stress distribution across all chips in the stack, preventing stress singularity from causing electrical characteristic variations. The stress-equalizing chip is not electrically connected to any other component, serving purely as a mechanical stress management element.
2Length of stationary object
If semiconductor chips are closely stacked to reduce thickness, then the package thickness is reduced, but stress concentration increases leading to piezoelectric effects that change electrical characteristics
Solution Approach 1:
The stress-equalizing chip is placed at a strategic position in the stack (either at the top or bottom) to provide beforehand cushioning against stress concentration. This dummy chip acts as a stress buffer that prevents excessive stress from reaching the functional semiconductor chips, thereby preventing piezoelectric effects that would otherwise alter their electrical characteristics.
3Reliability
If stress-equalizing chip is added to the chip stack, then stress variation is reduced, but the number of components and manufacturing complexity increases
Solution Approach 1:
The stress management function is extracted from the functional semiconductor chips and assigned to a separate stress-equalizing chip. This allows the functional chips to focus solely on their electrical functions while the dummy chip handles mechanical stress equalization. The stress-equalizing chip is simplified in structure with no electrical connections, making it easier to manufacture and integrate despite adding a component.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress-equalizing chip effectively reduces variations in electrical characteristics among semiconductor chips, facilitating the design and operation of correction circuits and enhancing carrier mobility, thereby improving the overall performance of the semiconductor package.
Implementation Method 1
A stress-equalizing chip is disposed on the chip stack, the stress-equalizing chip providing means to reduce the variation in the electrical characteristics between the plurality of semiconductor chips
Implementation Method 2
An encapsulant is disposed on the package substrate and is configured to cover at least a portion of the chip stack
Data Source
AI summary
A semiconductor package includes a chip stack having a plurality of semiconductor chips vertically stacked on a package substrate. A stress-equalizing chip is disposed on the chip stack, the stress-equalizing chip providing means to reduce the variation in the electrical characteristics of the plurality of semiconductor chips. An encapsulant is disposed on the package substrate and is configured to cover at least a portion of the chip stack. Each of the plurality of semiconductor chips is electrically connected to the package substrate. The stress-equalizing chip is not electrically connected to the substrate or to the plurality of semiconductor chips.