Stress-Inducing Layer for Semiconductor Defect Removal
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Solution Overview
Problem
Hetero-epitaxial growth of semiconducting materials like SiGe on silicon often results in defects such as dislocations due to lattice constant mismatch, particularly in confined spaces, which are challenging to address in active layers of semiconductor devices like FinFETs.
Innovation Solution
A method involving a patterned stress-inducing layer on a common planar surface to induce a shear stress field, followed by an anneal step to move defects towards the contact interface, and subsequent removal of the stress-inducing layer, which can include screening layers to control the stress field and defect movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hetero-epitaxial growth is performed to grow high mobility channel materials on silicon wafers, then device performance is improved, but defects such as dislocations are generated due to lattice constant mismatch
Solution Approach 1:
A stress-inducing layer is introduced as an intermediary between the silicon wafer and the high mobility channel material. This layer generates a stress field that activates dislocation movement, enabling defects to be transported to isolation structures where they are removed, thereby resolving the contradiction between achieving high device performance and eliminating growth-induced defects
Solution Approach 2:
The patent replaces conventional defect reduction methods with a stress-based mechanism. By applying mechanical stress through the stress-inducing layer during annealing, dislocations are mobilized and redirected toward isolation structures, substituting traditional thermal or chemical defect management approaches
2Object-generated harmful factors
If a stress-inducing layer is added to induce stress field for defect movement, then defects can be moved towards contact interface, but process complexity increases
Solution Approach 1:
The stress-inducing layer is designed as a temporary, sacrificial element that is deposited to perform its stress-induction function, then removed after defect transport is complete. This allows the complex stress-based defect removal mechanism to be implemented without permanently adding structural complexity to the device
Solution Approach 2:
The stress-inducing layer is deposited and activated in advance of final device completion, performing the defect transport function during an intermediate processing stage. This preliminary action removes defects before they become problematic in subsequent processing steps, simplifying the overall process by addressing defect issues early
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces or eliminates defects like dislocations from active layers, improving the quality and performance of semiconductor devices by effectively managing stress and defect movement during the growth process.
Implementation Method 1
providing a patterned stress-inducing layer on the common substantially planar surface, the stress-inducing layer being adapted for inducing a stress field in the active layer, the induced stress field resulting in a shear stress on defects, for instance dislocations
Implementation Method 2
performing an anneal step after providing the patterned stress-inducing layer on the common substantially planar surface, thereby optionally inducing a movement of the defects, for instance, dislocations, towards the contact interface
Data Source
AI summary
A method for reducing defects from an active layer is disclosed. The active layer may be part of a semiconductor in a semiconductor device. The active layer may be defined at least laterally by an isolation structure, and may physically contact an isolation structure at a contact interface. The isolation structure and the active layer may abut on a common substantially planar surface. The method may include providing a patterned stress-inducing layer on the common substantially planar surface. The stress-inducing layer may be adapted for inducing a stress field in the active layer, and induced stress field may result in a shear stress on a defect in the active layer. The method may also include performing an anneal step after providing the patterned stress-inducing layer on the common substantially planar surface. The method may additionally include removing the patterned stress-inducing layer from the common substantially planar surface.


