Stress Memorization Layer Proximity for Carrier Mobility
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Solution Overview
Problem
Conventional integrated circuit systems face challenges in enhancing carrier mobility due to the inefficiency of stress-inducing layer deposition processes, which often place the stress-inducing layer too far from the channel region, reducing its effectiveness in promoting carrier mobility.
Innovation Solution
The approach involves forming a gate and spacer over a substrate, performing an implant to amorphize the gate and source/drain regions, removing the spacer, and depositing a stress memorization layer in close proximity to the channel to effectively transfer stress during an anneal process, thereby improving carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional stress-inducing layer deposition process is used, then the stress-inducing layer is deposited, but it is placed too far from the channel region, reducing its efficacy for promoting carrier mobility
Solution Approach 1:
The method performs preliminary actions by removing the spacer before depositing the stress-inducing layer, creating a recess that positions the layer closer to the channel region. This preliminary structural preparation enables subsequent stress transfer to be more effective, resolving the contradiction between positioning accuracy and carrier mobility enhancement.
Solution Approach 2:
The invention applies local quality by creating a recess specifically at the region where stress transfer is needed (adjacent to the channel), rather than uniformly positioning the stress-inducing layer across the entire structure. This localized structural modification ensures the stress-inducing layer is optimally positioned where it can most effectively promote carrier mobility.
2Ease of manufacture
If the stress-inducing layer is deposited using conventional techniques, then the deposition process is simple, but the layer ends up too far from the channel region, reducing stress transfer effectiveness
Solution Approach 1:
The method performs preliminary actions by removing the spacer before depositing the stress-inducing layer, creating a recess that positions the layer closer to the channel region. This preliminary structural preparation enables subsequent stress transfer to be more effective, resolving the contradiction between positioning accuracy and carrier mobility enhancement.
Solution Approach 2:
Instead of trying to deposit the stress-inducing layer directly at the desired location (which is difficult with conventional techniques), the invention inverts the approach by first creating a recess through spacer removal, then depositing the layer on the exposed surface. This inverted sequence of operations naturally positions the layer closer to the channel region.
3Reliability
If the spacer is removed to enable closer stress memorization layer deposition, then carrier mobility enhancement is improved, but an additional process step is required
Solution Approach 1:
The spacer removal step serves multiple functions: it enables closer positioning of the stress-inducing layer for improved carrier mobility enhancement, and it creates the necessary recess structure for optimal stress transfer. By combining these functions into a single process step, the invention minimizes the increase in fabrication complexity while achieving significant performance improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances carrier mobility by ensuring the stress memorization layer is in closer proximity to the transistor gate and channel, improving the effectiveness of stress transfer and resulting in improved transistor performance.
Implementation Method 1
performing an implant that amorphizes the gate and a source/drain region defined by the spacer
Implementation Method 2
transferring a stress from the stress memorization layer to the gate and the source/drain region
Data Source
AI summary
An integrated circuit system that includes: providing a gate and a spacer formed over a substrate; performing an implant that amorphizes the gate and a source/drain region defined by the spacer; removing the spacer; depositing a stress memorization layer over the integrated circuit system; and transferring a stress from the stress memorization layer to the gate and the source/drain region.


