Stress-Neutral Metal-Dielectric Film Stack for Substrate Bow Control
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Solution Overview
Problem
The challenge in next-generation semiconductor devices is forming reliable sub-half micron features and gate structures with increasing circuit densities, which requires improved methods for interconnect formation to reduce manufacturing costs, memory cell size, and power consumption, especially in three-dimensional stacking of semiconductor chips.
Innovation Solution
A method involving the deposition of a first adhesion layer on an oxide layer, followed by a metal layer, forming a stress-neutral structure, which can be optionally enhanced with a second adhesion layer, to create a film stack that minimizes substrate bow and sheet resistance, facilitating efficient interconnect formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional metal layer deposition is used to form interconnects, then interconnect formation is achieved, but substrate bow exceeds acceptable limits and sheet resistance is high
Solution Approach 1:
The patent applies composite materials by creating a multi-layer film stack comprising alternating layers of metal (e.g., tungsten) and dielectric material (e.g., silicon oxide or silicon nitride). This composite structure allows the metal layers to provide low-resistance interconnect pathways while the dielectric layers provide stress compensation to control substrate bow, achieving both interconnect performance and substrate flatness requirements
Solution Approach 2:
The patent employs parameter changes by varying the thickness, material composition, and stress characteristics of individual layers within the film stack. By adjusting these parameters, the overall stress of the structure can be tuned to achieve stress neutrality, controlling substrate bow while maintaining low sheet resistance through optimized metal layer characteristics
2Device complexity
If single-layer metal deposition is used, then process simplicity is maintained, but stress control and substrate flatness are insufficient
Solution Approach 1:
The patent applies segmentation by dividing the single metal layer into multiple thin metal layers separated by dielectric layers. This segmentation allows each thin metal layer to contribute to low resistance while the intervening dielectric layers provide stress management, achieving better substrate bow control without requiring excessive thickness in any single layer
Solution Approach 2:
The patent implements local quality by assigning different functional properties to different layers within the film stack. Metal layers are optimized for electrical conductivity with specific thickness and material properties, while dielectric layers are optimized for stress control and insulation, allowing each layer to perform its specific function optimally within the composite structure
3Reliability
If adhesion layers are added to improve metal-dielectric bonding, then interconnect reliability is improved, but substrate bow increases due to additional stress
Solution Approach 1:
The patent uses adhesion layers as intermediary materials between the metal layers and dielectric layers. These adhesion layers (such as titanium nitride or tantalum nitride) provide strong bonding interfaces that improve metal-dielectric adhesion and prevent delamination, while their thin thickness and controlled stress properties minimize their contribution to overall substrate bow
Solution Approach 2:
The patent controls the impact of adhesion layers on substrate bow by optimizing their thickness and material composition parameters. The adhesion layers are kept sufficiently thin to minimize stress accumulation while maintaining adequate adhesion strength, and their material properties are selected to complement the stress characteristics of adjacent layers in the film stack
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress-neutral structure formed by the adhesion and metal layers reduces substrate bow to less than 1 μm and sheet resistance, enabling the formation of high-density interconnects with reduced manufacturing costs and power consumption, suitable for next-generation semiconductor devices.
Implementation Method 1
PVD deposition and anneal of multi-layer metal-dielectric film
Implementation Method 2
PVD deposition and anneal of multi-layer metal-dielectric film
Data Source
AI summary
The present disclosure provides a film stack structure formed on a substrate and methods for forming the film stack structure on the substrate. In one embodiment, the method for forming a film stack structure on a substrate includes depositing a first adhesion layer on an oxide layer formed on the substrate and depositing a metal layer on the first adhesion layer, wherein the first adhesion layer and the metal layer form a stress neutral structure.