Stress Relaxation Layer for Semiconductor Substrate Warp Control

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Solution Overview

Problem

Semiconductor devices using nitride semiconductors face issues with warping, cracking, and peeling at interfaces due to lattice and thermal expansion coefficient mismatches between growth substrates and semiconductor crystal layers, leading to reduced yield and device performance.

Innovation Solution

A stress relaxation layer is formed on the opposite and side faces of the substrate, aligned with the stress direction of the semiconductor crystal layer, to offset stress and prevent warping and peeling, using materials like SiN, WSi, and TiN, and applied through methods such as sputtering or CVD.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a stress offsetting layer is provided on the rear side of the growth substrate, then warp of the growth substrate and generation of cracks are inhibited, but peeling at the interface between the growth substrate and the semiconductor crystal layer cannot be effectively prevented

Engineering Contradiction:
Improvewarp inhibitionVSAvoidinterface peeling prevention
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The stress relaxation layer is extended from a two-dimensional configuration (only on the rear side) to a three-dimensional configuration by forming it continuously on the side face of the substrate. This dimensional extension allows the stress relaxation layer to provide stress offsetting not only on the rear side but also along the side face, effectively preventing peeling at the interface between the growth substrate and the semiconductor crystal layer while maintaining warp inhibition.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stress relaxation function is segmented into two distinct regions: a first stress relaxation layer on the rear side of the substrate and a second stress relaxation layer on the side face of the substrate. This segmentation allows each layer to specifically address different aspects of the problem - the first layer primarily inhibits warp, while the second layer primarily prevents interface peeling, thereby resolving the contradiction between these two functions.

Inventive Principle:
Principle #1Segmentation

2Strength

If a stress offsetting layer is provided on the rear side of the growth substrate, then generation of cracks is inhibited, but peeling at the interface between respective semiconductor layers cannot be effectively prevented

Engineering Contradiction:
Improvecrack resistanceVSAvoidinterface peeling prevention
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The stress relaxation layer is extended from a two-dimensional configuration (only on the rear side) to a three-dimensional configuration by forming it continuously on the side face of the substrate. This dimensional extension allows the stress relaxation layer to provide stress offsetting not only on the rear side but also along the side face, effectively preventing peeling at the interface between the growth substrate and the semiconductor crystal layer while maintaining warp inhibition.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stress relaxation function is segmented into two distinct regions: a first stress relaxation layer on the rear side of the substrate and a second stress relaxation layer on the side face of the substrate. This segmentation allows each layer to specifically address different aspects of the problem - the first layer primarily inhibits warp, while the second layer primarily prevents interface peeling, thereby resolving the contradiction between these two functions.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If the stress relaxation layer is formed only on the rear side of the substrate, then manufacturing is simpler, but peeling prevention at the interface is insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidinterface peeling prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The stress relaxation layer is formed continuously from the rear side through the side face of the substrate, merging the stress relaxation function across multiple surfaces into a single continuous structure. This approach provides comprehensive peeling prevention while maintaining manufacturing simplicity by using a single continuous formation process rather than separate discrete layers.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively inhibits warping and cracking, improves yield by preventing peeling, and allows for high-precision device patterning and stable electric characteristics in semiconductor devices like FETs and VCSELs.

Implementation Method 1

a stress relaxation layer, which gives stress to the substrate in the same direction as the direction of stress which the semiconductor crystal layer gives to the substrate

Methodology Applied
Scientific EffectStress:

Implementation Method 2

it is not possible to effectively inhibit peeling at the interface between the growth substrate and the semiconductor crystal layer, or peeling at the interface between respective semiconductor layers

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS7442999B2Semiconductor substrate, substrate for semiconductor crystal growth, semiconductor device, optical semiconductor device, and manufacturing method thereof
Publication Date: 2008.10.28 SUMITOMO ELECTRIC DEVICE INNOVATIONS
  • US7442999B2 patent drawing
  • US7442999B2 patent drawing
  • US7442999B2 patent drawing

AI summary

A semiconductor substrate includes: a semiconductor crystal layer grown on one face of a substrate; and a stress relaxation layer, which is formed on the other face opposite to the one face and the side face of the substrate and applies stress to the substrate in the same direction as the direction of stress which the semiconductor crystal layer applies to the substrate. In this case, stress of the semiconductor crystal layer to the substrate is offset. Therefore, warp of the semiconductor substrate and generation of cracks are inhibited.