Stressed Nanowire Stack for Field Effect Transistors
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Solution Overview
Problem
Field effect transistors employing suspended semiconductor nanowires face challenges in retaining mechanical stress, leading to deformation such as bending or buckling, which compromises the performance of the transistors.
Innovation Solution
A method involving the formation of a disposable gate structure and isolated gate structures to support suspended semiconductor nanowires, preventing distortion by using a combination of gate dielectric and conductor layers, and replacing the disposable gate with a replacement gate structure to maintain stress within the nanowires.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If suspended semiconductor nanowires are used to improve transistor performance, then mobility and on-current increase, but mechanical stress is lost due to deformation
Solution Approach 1:
The gate structure is divided into multiple discrete gate electrodes positioned at different heights along the nanowire stack, with each gate independently controlling a specific region. This segmentation allows stress to be maintained in each nanowire segment while enabling independent electrical control, resolving the contradiction between performance improvement and stress retention.
Solution Approach 2:
A stressor layer is introduced as an intermediary component between the nanowires and the surrounding structure. This layer applies and maintains mechanical stress on the nanowires without causing deformation, acting as a mediator that preserves both the stress state and the nanowire integrity for high-performance operation.
2Stability of the object's composition
If disposable gate structure is used to form isolated gates, then manufacturing complexity increases, but stress retention is improved
Solution Approach 1:
The disposable gate structure is formed early in the manufacturing process before the nanowires are fully released. This preliminary action allows the gate electrodes to be positioned and configured to maintain stress on the nanowires from the outset, preventing deformation during subsequent processing steps while managing complexity through staged fabrication.
Solution Approach 2:
The disposable gate structure serves as a temporary manufacturing aid that is formed, used to establish proper stress conditions and gate positioning, then selectively removed. This approach allows complex stress retention geometry to be achieved through simpler temporary structures, reducing overall manufacturing complexity while maintaining stress integrity.
Data Source
AI summary
A disposable gate structure is formed over the alternating stack of first semiconductor material portions and second semiconductor material portions. The second semiconductor material portions are removed selective to the first semiconductor material portions to form suspended semiconductor nanowires. Isolated gate structures are formed in regions underlying the disposable gate structure by deposition and recessing of a first gate dielectric layer and a first gate conductor layer. After formation of a gate spacer, source regions, and drain regions, raised source and drain regions are formed on the source regions and the drain regions by selective deposition of a semiconductor material. The disposable gate structure is replaced with a replacement gate structure by deposition and patterning of a second gate dielectric layer and a second gate conductor layer. Distortion of the suspended semiconductor nanowires is prevented by the disposable gate structure and the isolated gate structures.