Stretchable Computing Device Fabrication via 3D Via Integration
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Solution Overview
Problem
Conventional manufacturing techniques for stretchable computing devices are limited by the use of a single layer for electronic traces, which restricts circuit complexity and face challenges in encapsulation and durability, especially when integrated into textiles or worn on the skin.
Innovation Solution
The method involves creating multi-layered electronics by integrating vias to connect multiple layers of electronic traces within a stretchable member, which can be integrated into textiles or worn on the skin, using conductive pillars, flexible conductors, and stretchable materials to ensure electrical connectivity and durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple layers of conductive fabric are crocheted or knitted together, then the circuit complexity is improved, but the encapsulation difficulty and weatherproofing difficulty increase
Solution Approach 1:
The patent transitions from 2D planar circuits to 3D vertically-stacked circuits by adding the vertical dimension through multiple layers connected by vias. This allows complex circuits to be packaged in a smaller footprint while maintaining encapsulation feasibility, as the 3D structure can be more effectively sealed and protected.
Solution Approach 2:
The patent implements nesting by placing multiple layers of conductive fabric one inside another, with each layer containing portions of the circuit. The layers are nested vertically and connected through vias, allowing complex circuits to be compacted into a smaller volume while remaining encapsulable as a unified structure.
2Ease of manufacture
If conventional single-layer electronic traces are used, then the manufacturing simplicity is maintained, but the circuit complexity is limited
Solution Approach 1:
The patent segments the circuit into multiple layers, with each layer containing a portion of the overall circuit. This segmentation allows the circuit to achieve higher complexity while each individual layer can still be manufactured using relatively simple processes, and the layers are connected through vias.
Solution Approach 2:
The patent resolves the manufacturing simplicity vs. circuit complexity contradiction by moving from 2D to 3D circuit architecture. The additional vertical dimension allows complex circuits to be built by stacking multiple layers, each of which can be manufactured separately and then assembled, maintaining manufacturing feasibility while achieving high circuit complexity.
3Adaptability or versatility
If electronic yarn and thread are used in multi-layer fabric, then the flexibility is improved, but the fiber breakage and signal degradation increase
Solution Approach 1:
The patent uses composite materials by combining conductive fabric with non-conductive fabric layers. The conductive fabric provides electrical connectivity while the non-conductive fabric provides structural support and protection, creating a composite structure that maintains flexibility while preventing fiber breakage and signal degradation through the reinforcement of the overall fabric structure.
Data Source
AI summary
Some forms relate to a method of making a stretchable computing system. The method includes attaching a first set of conductive traces to a stretchable member; attaching a first electronic component to the first set of conductive traces; adding a first set of flexible conductors to the stretchable member such that the first set of flexible conductors is electrically connected to the first set of conductive traces; adding stretchable material to the stretchable member such that the first set of conductive traces is surrounded by the stretchable member; forming an opening in the stretchable member that exposes the first set of conductive traces; and attaching a second set of conductive traces to the stretchable member such that the second set of conductive traces fills the opening to form a via in the stretchable member that electrically connects the first set of conductive traces with the second set of conductive traces.