Programmable Stride Memory Testing Bypasses Faulty Modules
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Solution Overview
Problem
Hardware-based memory test devices face performance issues and longer boot times due to the need to stop and reset when accessing failed memory modules in interleaved memory systems, requiring extensive interactions between firmware and hardware.
Innovation Solution
Implementing programmable stride values in memory test devices to selectively access interleaved memory storage units, allowing them to skip over failed modules and focus on specific modules for testing or scrubbing operations without resetting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware based memory test devices access interleaved memory data sequentially, then complete memory testing is achieved, but performance deteriorates and boot times increase due to frequent stops and resets when encountering failed memory modules
Solution Approach 1:
The patent segments the memory access process by introducing stride values that divide the sequential access pattern into manageable chunks. Instead of accessing every memory location sequentially (which causes stops and resets), the system uses stride values to access memory locations in a segmented, skip-based manner, thereby maintaining testing completeness while improving productivity
Solution Approach 2:
The patent changes the access parameter from sequential stride (1) to variable stride values. By dynamically adjusting the stride value based on memory module status, the system can skip over failed modules and continue testing without stopping, thus resolving the contradiction between reliable complete testing and high productivity
2Reliability
If hardware based memory test devices stop and reset when accessing failed memory modules, then error detection is achieved, but device complexity increases due to extensive firmware-hardware interactions
Solution Approach 1:
The patent enables the memory test device to self-adjust its access pattern by automatically detecting failed memory modules and modifying its stride value accordingly. This self-service mechanism eliminates the need for extensive external firmware intervention, reducing device complexity while maintaining reliable error detection
Solution Approach 2:
The system implements feedback by monitoring memory access results and using this information to dynamically adjust the stride value. When a failed module is detected, the feedback mechanism modifies the access pattern to skip that module, thereby reducing the complexity of firmware-hardware interactions while preserving error detection capability
3Reliability
If hardware based memory test devices perform frequent stop and reset operations, then failed memory modules are identified, but boot time increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the memory test device with appropriate stride values before testing begins. This allows the system to proactively skip over known failed modules during the boot process, identifying them without requiring time-consuming stop and reset operations, thus reducing boot time while maintaining reliable identification
Data Source
AI summary
Systems and methods for implementing a stride value for memory are provided. One embodiment relates to a system that includes a plurality of memory modules configured to store interleaved data in a plurality of memory storage units according to a predetermined interleave. A memory test device is configured to perform a memory test that accesses a portion of the plurality of memory storage units in a sequence according to a programmable stride value. The memory test device performs the memory test by writing test data to each of the memory storage units in the portion of the plurality of memory storage units and reading the test data from each of the memory storage units in the portion of the plurality of memory storage units.