String Driver Deep Trench Isolation for Compact Memory Scaling
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Solution Overview
Problem
Advanced semiconductor memory devices require further reduction in string driver device dimensions and staircase region size to maintain scaling, necessitating a compact layout with deep trench isolations for through-wafer interconnects and electrical isolation, while accommodating memory array wafer contacts in a vertical direction.
Innovation Solution
The introduction of deep trench isolations in string driver devices, which are pinched off at the bottom and can completely pass through the substrate, with adjustable etch angles and trench top opening dimensions, along with a two-stage etching method for ion implanted regions, and wider channels for active regions to form effective electrical isolation and accommodate through-wafer interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If shallow trench isolation regions are used for through-wafer interconnects, then the manufacturing process is simpler, but the device density and compactness are reduced
Solution Approach 1:
The patent transitions from shallow trench isolation (2D planar approach) to deep trench isolation extending through the entire wafer thickness (3D vertical approach). This dimensional change allows through-wafer interconnects to pass directly through the substrate, reducing the horizontal footprint while maintaining electrical isolation functionality.
Solution Approach 2:
The patent changes the critical parameter of trench depth from shallow (not penetrating the substrate) to deep (completely through the wafer). This parameter change enables the interconnects to traverse the entire substrate thickness, achieving both compact layout and proper electrical isolation for stacked memory devices.
2Productivity
If string driver device dimensions are reduced for scaling, then device density increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent performs preliminary trench formation and isolation creation before final device assembly and stacking. By establishing the deep trench isolations and through-wafer interconnect paths in advance, the subsequent bonding and stacking processes can proceed with standard precision requirements, rather than requiring ultra-precise alignment during assembly.
3Reliability
If deep trench isolations with pinched-off bottoms are implemented, then electrical isolation is enhanced, but device complexity increases
Solution Approach 1:
The patent applies different trench geometries in different locations: deep trenches with pinched-off bottoms are used where maximum electrical isolation is required (between adjacent string drivers), while simpler through-wafer trenches are used for interconnect paths. This localized differentiation optimizes isolation performance where needed while controlling overall device complexity.
Data Source
AI summary
A semiconductor device including a substrate; a plurality of active regions that are disposed on the substrate and that are parallelly aligned; a plurality of first type of trench isolations having a first top critical dimension (CD), each of the plurality of the first type of trench isolations including sidewalls that taper towards one another along a depth direction; and a plurality of second type of trench isolations having a second top CD, the second top CD being larger than the first top CD and each of the plurality of the second type of trench isolations having a flat bottom trench surface.