Low Profile Strip DIMM with Passive Interposer Routing
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Solution Overview
Problem
Existing dual-inline memory modules (DIMMs) face challenges in reducing size while increasing data storage density, as the complexity and density of integrated circuits increase, leading to difficulties in routing signals to each memory chip, which results in higher costs and operational complexity.
Innovation Solution
A thin low profile strip DIMM design is implemented, using a passive interposer structure with conductive redistribution lines and solder ball connectors to route bus signals to each memory die without horizontal conductors on the interposer surfaces, allowing for overlapping die connections and reduced selection lines, thereby decreasing board space requirements and operational complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If separate chip enable signals are provided to each DIMM memory chip, then individual chip selection is achieved, but signaling lines and routing complexity increase significantly
Solution Approach 1:
Multiple memory chips are mounted on a single DIMM module and share common signaling lines. The chips are selectively enabled through a chip enable signal that is distributed to all chips on the module, allowing individual selection without requiring separate signaling lines for each chip.
Solution Approach 2:
The DIMM module design allows a single set of signaling lines to serve multiple memory chips simultaneously. The same bus lines are used for addressing and controlling all chips on the module, making the signaling infrastructure universal rather than dedicated to each individual chip.
2Quantity of substance
If memory density is increased by adding more chips, then storage capacity improves, but board space requirements and routing complexity increase
Solution Approach 1:
Memory chips are arranged in a three-dimensional configuration on the DIMM module, utilizing vertical stacking and multi-layer mounting. This allows multiple chips to occupy a smaller projected board area by extending into the vertical dimension and utilizing the module's depth rather than spreading chips out horizontally across the board.
Solution Approach 2:
Multiple memory chips are mounted in a compact arrangement on the DIMM module substrate, with chips positioned to maximize space utilization. The chips are nested within the module's form factor, allowing high density packaging within a standardized DIMM size that occupies minimal board space.
3Quantity of substance
If memory chip density increases, then storage capacity improves, but signal routing problems and operational complexity increase
Solution Approach 1:
The DIMM module is designed as a discrete, self-contained unit with all memory chips and their interconnections packaged together. This segmentation allows the complex signal routing to be contained within the module rather than extending across the entire motherboard, simplifying the overall system routing while maintaining high chip density within the module.
Solution Approach 2:
The DIMM module substrate acts as an intermediary between the motherboard and the multiple memory chips. All complex signal routing and chip interconnections are handled within the module's internal architecture, isolating the motherboard from routing complexity while enabling high-density chip configurations.
Data Source
AI summary
A low profile strip dual in-line memory module (200) includes a passive interposer support structure (90) with patterned openings (91-97) formed between opposing top and bottom surfaces, a plurality of memory chips (D1-D8) attached to the top and bottom surfaces, and vertical solder ball conductors (98) extending through the patterned openings to electrically connect the plurality of memory chips, where each memory chip has an attachment surface facing the passive interposer structure and a patterned array of horizontal conductors (e.g., 82-86) formed on the attachment surface with contact pads electrically connected to the plurality of vertical conductors to define at least one bus conductor that is electrically connected to each memory die in the first and second plurality of memory die.