Stripe Locking for Fault Tolerant Memory Access

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Solution Overview

Problem

Current data storage devices with fault tolerance mechanisms, such as RAID, face issues with parity-data inconsistency due to concurrent accesses from multiple redundancy controllers, leading to potential race conditions and data/parity inconsistencies in high-performance compute and storage servers.

Innovation Solution

Implementing stripe locking methods to serialize concurrent accesses by using lock primitives that acquire and release locks for specific stripes, ensuring atomic access to multiple memory modules and preventing concurrent modifications, thus maintaining parity-data consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple redundancy controllers access memory modules concurrently to improve performance, then productivity increases, but data and parity consistency deteriorates due to race conditions

Engineering Contradiction:
Improveaccess performanceVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A lock manager is introduced as an intermediary component that mediates access requests from multiple redundancy controllers to the same stripe. The lock manager receives lock requests, grants exclusive access rights, and coordinates unlock operations, thereby preventing race conditions while allowing concurrent access from different controllers to different stripes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The locking functionality is extracted as a separate, dedicated component (lock manager) rather than being embedded within each redundancy controller. This separation allows centralized management of concurrency control and simplifies the design of individual controllers while maintaining data consistency across the system.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If stripe locking is implemented to ensure data consistency, then reliability improves, but device complexity increases due to lock management overhead

Engineering Contradiction:
Improvedata consistencyVSAvoidlock management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Lock management is segmented into distinct operations (lock request, lock grant, unlock) that can be independently managed and tracked. Each stripe has its own lock state, allowing fine-grained control where locks are acquired only for specific stripes being accessed, not for the entire memory system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The lock manager serves multiple functions: it acts as a semaphore for exclusive access, a queue manager for pending requests, and a coordinator for maintaining consistency. This multi-functionality reduces the need for separate mechanisms and simplifies the overall system architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If atomic access sequences are enforced to maintain parity-data consistency, then manufacturing precision improves, but loss of time increases due to serialization overhead

Engineering Contradiction:
Improveparity-data consistencyVSAvoidaccess latency
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Serialization and locking are applied locally only to the specific stripes being accessed, not to the entire memory system. Different stripes can be accessed concurrently by different redundancy controllers as long as they don't overlap, minimizing the scope of serialization and reducing overall access latency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Lock acquisition is performed as a preliminary action before the actual data access sequence. By obtaining the lock in advance and holding it throughout the entire read-modify-write sequence, the system ensures atomicity without requiring complex coordination during the actual data transfer operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11016683B2Serializing access to fault tolerant memory
Publication Date: 2021.05.25 HEWLETT PACKARD ENTERPRISE DEV LP
  • US11016683B2 patent drawing
  • US11016683B2 patent drawing
  • US11016683B2 patent drawing

AI summary

According to an example, a lock may be requested by a first redundancy controller from a parity media controller to perform a first sequence that accesses multiple memory modules in a stripe. The lock may be acquired for the stripe so that the first sequence may be performed on the stripe. The lock may then be released from the stripe.