Memory Controller Stripe Parity Data Recovery
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Solution Overview
Problem
Existing memory systems face challenges in effectively recovering data from pages that fail during read operations when accessing stripe data, which is grouped from multiple pages and parity pages, often requiring re-reading successful pages to correct errors.
Innovation Solution
A memory system and operating method that generate parity data by performing cumulative parity operations on successful pages and store this data in a buffer memory, allowing for data recovery of failed pages without re-reading successful data, using an XOR operation and error correction codes to distinguish and correct errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory system re-reads successful pages to correct errors in failed pages, then data recovery capability is improved, but read operation time and efficiency deteriorate
Solution Approach 1:
The patent pre-calculates and stores parity data for each stripe group in the buffer memory before read operations occur. When a read failure happens, the system can immediately use the pre-stored parity data to recover failed pages without re-reading successful pages, thus resolving the contradiction between data recovery capability and read operation time
Solution Approach 2:
The patent introduces a buffer memory as an intermediary component that stores pre-calculated parity data. This buffer memory acts as a mediator between the memory devices and the error correction process, enabling fast data recovery without requiring re-reading of successful pages, thereby improving both reliability and time efficiency
2Productivity
If the memory system stores pre-calculated parity data in buffer memory, then data recovery efficiency is improved, but memory resource consumption increases
Solution Approach 1:
The patent applies partial action by storing only the necessary parity data for the current stripe group being accessed in the buffer memory, rather than pre-calculating and storing parity data for all possible stripe groups. This selective approach improves data recovery efficiency while controlling buffer memory consumption to reasonable levels
Data Source
AI summary
A memory system includes a plurality of memory devices, a buffer memory, and a controller. The controller generates bitmap information for a plurality of pages to distinguish a first page on which a read operation has succeeded from a second page on which the read operation has failed, and stores the bitmap information in the buffer memory, whenever completing the read operation for each of the plurality of pages. The controller generates parity data by cumulatively performing a parity operation on data of the first page whenever performing the read operation on each of the plurality of pages, and stores the parity data in the buffer memory. The controller checks the bitmap information after the read operations on the plurality of pages are completed, and recovers data of the second page by referring to the parity data when the second page is present among the plurality of pages.