Stripe-Based Self-Gating for Retiming Pipeline Power Reduction

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Solution Overview

Problem

In large retiming pipelines, clock gating techniques increase power consumption without a corresponding area increase, and existing methods for reducing power consumption in self-gating circuits lead to additional circuit area, making them inefficient for high-frequency digital designs.

Innovation Solution

Implement stripe-based self-gating by partitioning the circuit into stages, self-gating only the first stage of each stripe, and using a change detect signal to enable clocking for subsequent stages, thereby reducing power consumption without increasing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If self-gating circuits are implemented for each stage of retiming pipeline, then power consumption is reduced, but circuit area increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit area
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

The circuit is divided into stripes, with only the first stage of each stripe implementing self-gating circuitry. Subsequent stages within the same stripe share the change detect signal from the first stage, eliminating the need for duplicate self-gating circuits in each stage while maintaining power savings.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple stages within a stripe share a common change detect signal generated by the first stage's self-gating circuitry. This merging approach allows one self-gating circuit to control clocking for multiple stages, reducing total circuit area while achieving power consumption reduction across all stages in the stripe.

Inventive Principle:
Principle #5Merging (Combining)

2Loss of energy

If clock gating is implemented for each stage, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The change detect signal generated by the first stage's self-gating circuitry serves multiple functions: it controls clocking for the first stage and is distributed to control clocking for all subsequent stages within the stripe. This multi-functionality reduces the need for separate control circuits in each stage, simplifying the overall device while maintaining power savings.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of energy

If self-gating circuitry is added to reduce power consumption, then energy efficiency improves, but manufacturing complexity increases

Engineering Contradiction:
Improveenergy efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The circuit is organized into stripes where self-gating circuitry is segmented to appear only at the first stage of each stripe. This segmentation reduces the total quantity of self-gating circuits that need to be manufactured and placed, simplifying the manufacturing process while maintaining energy efficiency benefits across all stages through signal sharing.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3977620B1Stripe based self-gating for retiming pipelines
Publication Date: 2025.10.15 ADVANCED MICRO DEVICES INC
  • EP3977620B1 patent drawingFigure 1
  • EP3977620B1 patent drawingFigure 2
  • EP3977620B1 patent drawingFigure 3

AI summary

Systems, apparatuses, and methods for implementing stripe-based self-gating and change detect signal propagation for retiming pipelines are disclosed. A circuit includes one or more stripes, with each stripe including a plurality of stages of registers, with each stage only receiving input signals from the preceding stage. For a given stripe, the first stage of registers are self-gated to reduce power consumption by only clocking a group of registers when any of their input signals change. The self-gating signals of the first stage of registers are combined together to create a change detect signal which is passed through a register and provided to a second stage of registers as a clock-enable signal. Accordingly, the second stage registers are only clocked when the change detect signal indicates a change will be forwarded from the first stage. This reduces power consumption for the second stage without causing the area increase associated with self-gating circuitry.