Strobe Tree Circuit for HBM Data Capture
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Solution Overview
Problem
In electronic devices, existing memory technologies face challenges in centering the rising edges of read strobe signals within data eyes, particularly in High Bandwidth Memory (HBM) systems, which affects data capture efficiency and requires high performance, power, and area (PPA) costs.
Innovation Solution
The implementation of a strobe tree circuit with multiplexers that allow swapping of complementary read strobe signals by one unit interval (UI), facilitating the centering of rising edges within data eyes using a low PPA solution, by configuring the circuit with flip-flops, comparators, and multiplexers to adjust the strobe signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing memory technologies are used to access memory, then memory access can be performed, but the rising edges of read strobe signals cannot be centered within data eyes, affecting data capture efficiency
Solution Approach 1:
The patent implements dynamic adjustment of strobe signal timing by swapping complementary read strobe signals based on detected data eye positions. The system continuously monitors data eye centers and dynamically selects which strobe signal (true or complementary) to use for capturing data, allowing the rising edges to be centered within the data eyes for optimal capture efficiency
Solution Approach 2:
The system employs feedback mechanisms where data eye detection circuits monitor the position of data eyes and provide information to the strobe tree circuit. Based on this feedback, the system adjusts the selection of strobe signals to ensure rising edges are properly centered, creating a closed-loop control system that optimizes data capture timing
2Productivity
If high performance solutions are used to center rising edges of read strobe signals, then data capture efficiency improves, but performance, power, and area (PPA) costs increase
Solution Approach 1:
The patent uses multiplexers as a low-cost alternative to complex delay circuits. By swapping between true and complementary strobe signals using simple multiplexer components, the system achieves rising edge centering without requiring extensive delay circuitry, thereby reducing power consumption while maintaining data capture efficiency
Solution Approach 2:
The system extracts only the essential function of timing adjustment by using multiplexers to select between pre-existing complementary strobe signals, rather than implementing full delay circuits. This extraction approach achieves the necessary timing correction with minimal power overhead
3Productivity
If high performance solutions are used to center rising edges of read strobe signals, then data capture efficiency improves, but area costs increase
Solution Approach 1:
The patent replaces area-intensive delay circuits with compact multiplexer components. The multiplexers occupy significantly less silicon area while achieving the same timing adjustment function by swapping between complementary strobe signals, thereby reducing the overall area cost of the memory interface circuitry
Solution Approach 2:
The multiplexers serve multiple functions: they swap complementary strobe signals, enable rising edge centering, and provide a low-area alternative to delay circuits. This multi-functionality allows a single component to replace what would otherwise require multiple specialized circuits, reducing total area
4Manufacturing precision
If complementary read strobe signals are swapped to move rising edges by one unit interval, then rising edges can be centered to data eyes, but circuit complexity increases
Solution Approach 1:
The patent introduces dynamic signal swapping capability to the strobe tree circuit through multiplexers. By conditionally exchanging true and complementary strobe signals based on data eye position, the system achieves precise rising edge centering while maintaining a relatively simple circuit structure that can adapt its behavior dynamically
Data Source
AI summary
Examples herein relate to devices that include a strobe tree circuit for capturing data using a memory-sourced strobe. In an example, a device includes a data capture path including first and second flip-flops, and a strobe tree including a comparator and first and second multiplexers. The comparator is configured to output complementary signals on first and second output nodes. First and second selection input nodes of the first multiplexer are connected to the first and second output nodes of the comparator, respectively. First and second selection input nodes of the second multiplexer are connected to the second and first output nodes of the comparator, respectively. The read strobe tree is configured to provide first and second signals output from the first and second multiplexers to first and second nodes, respectively. Clock input nodes of the first and second flip-flops are connected to the first and second nodes, respectively.